Abstract: Ultraviolet light sources such as UV and DUV laser diodes and light emitting diodes (LEDs) are described. The UV light source may comprise at least one quantum well with first and second photoconductive layers on opposite sides thereof. The UV light source may further comprise at least one optical pump configured to direct pump light to the UV light emitter. The pump light may have a photon energy less than the band gap of the at least one quantum well to increase the conductivity of electrons and holes in the first and second photoconductive layers. The electrons and holes can thereby propagate to the quantum well where at least some of the electrons and holes combine resulting in the emission of UV light.

Abstract: Power amplifier apparatuses and techniques for optimizing the design of power amplifiers are disclosed. In one aspect, a method for optimizing a power amplifier includes selecting a circuit topology for the power amplifier. The circuit topology includes one or more photoconductive switches and an impedance matching network including one or more parameter values representative of the impedance matching network or the photoconductive switches that can be adjusted. The method further includes selecting one or more optimization goals for the impedance matching network and the one or more photoconductive switches, and adjusting the one or more parameter values according to the one or more optimization goals. The one or more optimization goals include an efficiency at a particular power output.

Abstract: Amorphous silicon carbide may be doped with one or more ions such as vanadium and these ions may radiate light if excited, for example, using optical or electrical pumping. A single photon light source may be formed from a single such ion that is pumped or from a plurality of ions that are pumped if light from only one ion is collected, e.g., using an aperture or pin hole. Such single photon sources may possibly be use in quantum computing, quantum sensing and/or quantum telecommunications.

Abstract: In one embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of three dimensional (3D) structures above the substrate, a gate region, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure. The gate region is present on a portion of an upper surface of the second region and the gate region is coupled to a portion of the at least one vertical sidewall of each 3D structure.

Abstract: According to one embodiment, a device includes a first electrode, a second electrode spaced from the first electrode, a well extending between the first electrode and the second electrode, one or more chalcogens in the well, and at least one halogen mixed with the one or more chalcogens in the well. In addition, the chalcogens are selected from the group consisting of sulfur, selenium, tellurium, and polonium.

Abstract: Production of decontaminated water from contaminated water using a vessel, an inlet to the vessel wherein the contaminated water is introduced into the vessel, an outlet to the vessel wherein the decontaminated water is removed from the vessel, a plasmonic-photocatalyst membrane connected to the vessel, plasmonic nanoparticles or nanostructures connected to the plasmonic-photocatalyst membrane, and a source of ultraviolet light that directs ultraviolet light onto the vessel, the plasmonic-photocatalyst membrane, the plasmonic nanoparticles or nanostructures, and the contaminated water to produce the decontaminated water from the contaminated water.

Abstract: Power amplifier apparatuses and techniques for optimizing the design of power amplifiers are disclosed. In one aspect, a method for optimizing a power amplifier includes selecting a circuit topology for the power amplifier. The circuit topology includes one or more photoconductive switches and an impedance matching network including one or more parameter values representative of the impedance matching network or the photoconductive switches that can be adjusted. The method further includes selecting one or more optimization goals for the impedance matching network and the one or more photoconductive switches, and adjusting the one or more parameter values according to the one or more optimization goals. The one or more optimization goals include an efficiency at a particular power output.

Abstract: An apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a first semiconductor material, an array of three dimensional (3D) structures above the substrate, a sidewall heterojunction layer positioned on at least one vertical sidewall of each 3D structure, and an isolation region positioned between the 3D structures. Each 3D structure includes the first semiconductor material. The sidewall heterojunction layer includes a second semiconductor material, where the first and second semiconductor material have different bandgaps.

Abstract: An apparatus includes a heterostructure including a substrate of Group-III-nitride material, a source layer including a dopant positioned on a surface of the substrate, and a conductive cap layer positioned on the source layer. A method of electric field-enhanced impurity diffusion includes obtaining a heterostructure including a substrate of Group-III-nitride semiconductor material, a source layer including a dopant positioned directly on the substrate, and a conductive cap layer positioned above the source layer, and applying a thermal annealing treatment to the heterostructure. An electric field gradient is established within the source layer and the cap layer for causing diffusion of an element from the substrate to the cap layer, and for causing diffusion of the dopant from the source layer to a former location of the element in the substrate thereby changing a conductivity and/or magnetic characteristic of the substrate.

Abstract: In one embodiment, a method of forming a vertical transistor includes forming a layer comprising a semiconductor material above a substrate, defining three dimensional (3D) structures in the layer, forming a second region in at least one vertical sidewall of each 3D structure, and forming an isolation region between the 3D structures. In another embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of 3D structures above the substrate, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure.

Abstract: In one embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of three dimensional (3D) structures above the substrate, a gate region, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure. The gate region is present on a portion of an upper surface of the second region and the gate region is coupled to a portion of the at least one vertical sidewall of each 3D structure.

Abstract: According to one embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a semiconductor material; an array of three dimensional (3D) structures above the substrate; and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, where the second region includes a portion of at least one vertical sidewall of the 3D structure.

Abstract: In one embodiment, a product includes a structure comprising a material of a Group-III-nitride having a dopant, where a concentration of the dopant in the structure has a concentration gradient characteristic of diffusion of the dopant inward from at least a portion of a surface of the structure in a direction substantially normal to the portion of the surface. The structure has less than 1% decomposition of the Group-III-nitride at the surface of the structure.

Abstract: Production of decontaminated water from contaminated water using a vessel, an inlet to the vessel wherein the contaminated water is introduced into the vessel, an outlet to the vessel wherein the decontaminated water is removed from the vessel, a plasmonic-photocatalyst membrane connected to the vessel, plasmonic nanoparticles or nanostructures connected to the plasmonic-photocatalyst membrane, and a source of ultraviolet light that directs ultraviolet light onto the vessel, the plasmonic-photocatalyst membrane, the plasmonic nanoparticles or nanostructures, and the contaminated water to produce the decontaminated water from the contaminated water.

Abstract: According to one embodiment, an apparatus includes a substrate, and at least one three dimensional (3D) structure above the substrate. The substrate and the 3D structure each include a semiconductor material. The 3D structure also includes: a first region having a first conductivity type, and a second region coupled to a portion of at least one vertical sidewall of the 3D structure.

Abstract: Techniques, systems, and devices are disclosed that relate to coaxial photoconductive switch modules. The coaxial photoconductive switch may include an outer conductor, an inner conductor, and a photoconductive material positioned between the inner conductor and the outer conductor. The inner conductor, the outer conductor, and the photoconductive material have a predetermined height. A bias voltage may be applied between the inner conductor and the outer conductor. When light of a predetermined wavelength and a predetermined intensity is incident on the photoconductive material, the photoconductive material may break down allowing a current to flow through the photoconductive material between the inner conductor and the outer conductor.

Abstract: According to one embodiment, a product includes an array of three dimensional structures, a cavity region between each of the three dimensional structures, and a first material in contact with at least one surface of each of the three dimensional structures. In addition, each of the three dimensional structures includes a semiconductor material, where at least one dimension of each of the three dimensional structures is in a range of about 0.5 microns to about 10 microns. Moreover, the first material is configured to provide high energy particle and/or ray emissions.

Abstract: A total internal reflection photoconductive switch and method of activating such a switch, where the switch includes a pair of electrodes on opposite sides of a photoconductive material having a substantially-rectangular prism geometry. The substantially-rectangular prism geometry includes four edge facets, two opposing electrode-connection facets separated by the edge facets, and at least one input facet located at a corner of the substantially-rectangular prism geometry that is positioned between two edge facets and the two electrode-connection facets, for receiving light therethrough into the photoconductive material at angles supporting total internal reflection.

Abstract: In one embodiment, a product includes a structure comprising a material of a Group-III-nitride having a dopant, where a concentration of the dopant in the structure has a concentration gradient characteristic of diffusion of the dopant inward from at least a portion of a surface of the structure in a direction substantially normal to the portion of the surface. The structure has less than 1% decomposition of the Group-III-nitride at the surface of the structure.

Abstract: Techniques, systems, and devices are disclosed that relate to coaxial photoconductive switch modules. The coaxial photoconductive switch may include an outer conductor, an inner conductor, and a photoconductive material positioned between the inner conductor and the outer conductor. The inner conductor, the outer conductor, and the photoconductive material have a predetermined height. A bias voltage may be applied between the inner conductor and the outer conductor. When light of a predetermined wavelength and a predetermined intensity is incident on the photoconductive material, the photoconductive material may break down allowing a current to flow through the photoconductive material between the inner conductor and the outer conductor.