Abstract: A multi-channel DSL communication link in accordance with the present invention may comprise a plurality of N DSL transceivers each configured with at least two bi-directional serial data interfaces with the first interface of a first transceiver coupled to a communication interface and the second interface of the first transceiver coupled to a first bi-directional serial data port of a second transceiver. Subsequent transceivers may be coupled in this manner with its Nth?1 and Nth+1 nearest transceivers. A method for transferring data between multiple transceivers is also disclosed, which can be described as follows: recovering a mapped portion of a downstream data stream at each of N DSL transceivers; communicating the portion to the next closest transceiver to a communication interface; and mapping an upstream data stream for transmission via the N transceivers; using each respective transceiver's second data interface to communicate a mapped portion to the next furthest transceiver.

Abstract: A parallel-to-serial-to-parallel circuit are disclosed, the circuit interfacing with a data bus, preferably with a processor for byte alignment and other operations. The parallel-to-serial-to-parallel circuit includes an input bit shift register having a predetermined number of register positions and an output bit shift register with the same number of register positions. The output of the input bit shift register is fed into the output bit shift register through a multiplexer. The input bit shift register may receive a bit write from a bit bus, a partial parallel write from a data bus with corresponding data validity data received on a shadow bus, and full parallel write from the data bus. The output bit shift register may transmit a bit read to the bit bus or a full parallel read to the data bus. Data received is shifted to the output bit shift register and compiled into full parallel data or read out as single bits. Offset bits may be introduced in the data stream for data alignment.

Abstract: A system and method for a communication to communicate both POTS and XDSL are provided. In accordance with one aspect of the invention, in improved central office line card circuit is provided, wherein the line card circuit includes a two-wire signal line for electrical connection with a two-wire local loop. A line interface card interfaces with the local loop and includes a bi-directional line for bi-directional communication with the signal line. In addition, the line interface circuit further has an input line and an output line. A first channel has an output electrically connected to the input line of the line interface circuit, and the first channel has inputs for both a pulse code modulation (PCM) input and a xDSL input. Similarly, a second channel has an input that is electrically connected to the output line of the line interface circuit. In addition, the second channel has outputs for both a PCM output and a xDSL output.

Abstract: A vehicle with unlimited mobility in all directions in the driving plane, in which the wheels are provided with a pivot drive which is set on the basis of values determined by a computer. The calculation is effected according to an algorithm, whose basis results from the geometric relations of triangles whose corner points are formed by the respective pivot axis of the wheel, the vehicle center M, and the center Dn, D'n of the instantaneous track curve.

Abstract: A method and apparatus for washing the surface of an object in which a rotating brush is provided. The bristles of the brush are supplied with a washing liquid through a hollow shaft for a limited angular rotation so that the washing liquid effectively is transmitted to the ends of the bristles substantially only during the time they make contact with the surface.