Abstract: An apparatus and process for cleaning residual matter, photoresist and other foreign materials off wafers, substrates and semiconductor work pieces including photomasks, compact discs, flat panel displays using megasonic acoustic wave action techniques in conjunction with supercritical fluid cleaning processes, and in particular, for coupling megasonics techniques with supercritical carbon dioxide processing with co-solvents and surfactants, using cycles of soak, rapid decompression and flushing, to improve cleaning capability and to remove submicron particles from the surfaces of wafers.

Abstract: During wafer fabrication, a transportable enclosure, such as a Standard Manufacturing InterFace (SMIF) pod encloses a nascent product, such as a semiconductor wafer, to protect the wafer against contamination during manufacture, storage or transportation. However chemical vapors emitted inside the pod can accumulate in the air and degrade wafers during subsequent fabrication. In order to absorb the vapors inside a closed pod, a vapor removal element typically including an activated carbon absorber, covered by a particulate-filtering vapor-permeable barrier, and covered by a guard plate with holes is disposed within the enclosure. A vapor removal element is disposed closely adjacent to each respective wafer. Alternatively, a single vapor removal element is located inside the enclosure. In certain instances, a fan or thermo-buoyant circulation causes any vapors located inside the enclosure to a vapor removal element for removal.

Abstract: A thin film region 14 of a multichip carrier 10 is provided with at least one fabrication process or tooling monitor for monitoring the quality of the fabrication process during the sequential formation of the layers of the region 14. The process monitor is formed with a desired layer or layers of the thin film region, such as by a photolithographic process. A centrally disposed active wiring region 30 of a layer is surrounded by peripherally disposed fabrication monitor sites 32. The sites 32 can be located such that they do not occupy or interfere with the surface area required for the wiring region 30 while still being disposed near enough to the wiring region such that the electrical and physical characteristics of the thin film is substantially the same. Four different types of thin film fabrication process monitors are disclosed, including a line/via monitor, a dielectric monitor, a laser assisted repair monitor and a laser assisted engineering change monitor.

Abstract: Use of a dual composite mask for a lift-off multi-layered structure process in which a base component layer acts as an etch stop for reactive ion etching of overlying layers.

Abstract: Formation of planar conductor/insulator semiconductor devices utilizing hafnium coated aluminum based metallization with a magnesium oxide mask for dry etching of the metallization and deposition of planar insulation.The hafnium coating is used to protect the aluminum metallization during mask removal, and as a registration enhancer for subsequent electron-beam processing.

Abstract: Use of a dual composite mask for a lift-off multi-layered structure process in which a base component layer acts as an etch stop for reactive ion etching of overlying layers.

Abstract: A method for forming thin film patterns in the fabrication of integrated circuits utilizing a lift-off mask in an inverse vertical relationship with the desired metal film. The method involves the preliminary blanket deposition of the metal in-point, followed by a coating of a patterned lift-off mask over which is blanket coated a dry-etch resistant material with subsequent removal of the lift-off mask, and dry etching of the exposed metal film. In one embodiment the dry-etch mask can comprise a diverse metal layer when a dry-etch ambient is employed which is passive to the diverse metal. In another embodiment, where dry etch ambients are employed which are corrosive to the diverse metal which is desired in the final structure, it can be covered with a blanket layer of any convenient dry-etch resistant material, such as magnesium oxide, prior to removal of the lift-off mask.

Abstract: A planar deep oxide isolation process for providing deep wide silicon dioxide filled trenches in the planar surface of a silicon semiconductor substrate, said process comprising the steps:(a) forming deep wide trenches in the planar surface of the silicon substrate;(b) forming a thin layer of silicon dioxide on the planar surface of the silicon substrate and the exposed silicon surfaces of said deep wide trenches;(c) applying resin glass (polysiloxane) to the planar surface of said semiconductor substrate and within said deep wide trenches;(d) spinning off at least a portion of the resin glass on the planar surface of the substrate;(e) baking the substrate at a low temperature;(f) exposing the resin glass contained within the deep wide trenches of substrate to the energy of an E-beam;(g) developing the resin glass contained on said substrate in a solvent;(h) heating said substrate in oxygen to convert said resin glass contained within said deep wide trenches to silicon dioxide;(i) depositing a layer of silico