Abstract: A digital image processor is provided. The digital image processor includes a deinterlacing processor that is implemented upon a digital processing unit. The deinterlacing processor is coupled to an input operable to receive an interlaced video stream, a digital memory for storing portions of the interlaced video signal, and an output operable to transmit a deinterlaced video stream. The deinterlacing processor is operable to detect the source type of the received interlaced video stream to generate the deinterlaced video stream having reduced or no motion artifacts.

Abstract: A digital image processor includes an input buffer operable to receive an interlaced video stream and a digital memory for storing portions of the interlaced video stream. An output buffer is operable to transmit a deinterlaced video stream. Also included is a deinterlacing processor coupled between said input buffer and said output buffer and to said digital memory, said deinterlacing processor is operable to store portions of said received interlaced video stream from said input buffer into said digital memory and to detect diagonal features in said portions of said received interlaced video stream in said digital memory, and to generate said deinterlaced video stream having smoothed diagonal features therefrom.

Abstract: A digital image processor is provided. The digital image processor includes a deinterlacing processor coupled between an input buffer operable to receive an interlaced video stream and an output operable to transmit a deinterlaced video stream. The deinterlacing processor is also coupled to a digital memory for storing portions of the interlaced video signal. The deinterlacing processor is operable to detect said diagonal features in the portions of the received interlaced video stream and to generate the deinterlaced video stream having smoothed diagonal features.

Abstract: A digital image processor is provided. The digital image processor includes a deinterlacing processor that is implemented upon a digital processing unit. The deinterlacing processor is coupled to an input operable to receive an interlaced video stream, a digital memory for storing portions of the interlaced video signal, and an output operable to transmit a deinterlaced video stream. The deinterlacing processor is operable to perform frequency analysis upon the received interlaced video stream in order to generate the deinterlaced video stream having reduced motion artifacts.

Abstract: A digital image enhancer includes a deinterlacing processor receptive to an interlaced video stream. The deinterlacing processor includes a first deinterlacer and a second deinterlacer and provides a deinterlaced video stream. The digital image enhancer also includes a video output processor receptive to the output of the deinterlaced video stream to provide a scaled, deinterlaced video stream. A portable DVD player including the digital video enhancer has a generally thin prismatic enclosure having a first major surface, a second major surface separated from said first major surface, and side surfaces connecting the first major surface to the second major surface. At least a portion of the first major surface includes a video display, and the enclosure includes a DVD entry port such that a DVD can be inserted into the enclosure.

Abstract: A digital image enhancer includes a deinterlacing processor receptive to an interlaced video stream. The deinterlacing processor includes a first deinterlacer and a second deinterlacer and provides a deinterlaced video stream. The digital image enhancer also includes a video output processor receptive to the output of the deinterlaced video stream to provide a scaled, deinterlaced video stream. A portable DVD player including the digital video enhancer has a generally thin prismatic enclosure having a first major surface, a second major surface separated from said first major surface, and side surfaces connecting the first major surface to the second major surface. At least a portion of the first major surface includes a video display, and the enclosure includes a DVD entry port such that a DVD can be inserted into the enclosure.

Abstract: An improved apparatus and method for performing sample rate conversion of digital sample values is disclosed. The sample rate conversion utilizes a finite impulse response filter that substantially eliminates the introduction of phase errors that plague conventional approaches. The computations required to implement the finite impulse response filter are provided in a hardware implementation that is efficiently constructed and utilized so as to be practical to implement in hardware as well as being fast enough to process the incoming samples in essentially real time. The digital sample values being processed by the invention can, for example, be audio, video or graphics related digital sample values. The sample rate conversion is suitable for scaling the size of the images (graphical or video) along one or more axes, or for time compression or expansion of an audio streaming rate.

Abstract: A sensor is provided for automatically detecting the presence or absence of an electronic device which interfaces with other devices via an information signal. The sensor comprises a receiving connector which receives a mating connector associated with the electronic device to electrically and physically connect the device to the sensor and to another device. The receiving connector includes a terminal to which the information signal is applied. The sensor also comprises a sensing circuit connected to the terminal of the receiving connector for detecting whether the information signal is present at the terminal. The sensing circuit generates an output signal which indicates when a mating connector is received within the receiving connector, and thus whether the electronic device is present, in dependence upon whether the information signal is detected at the terminal.

Abstract: An apparatus and a method are provided for smoothing out high frequency information in an interlaced computer generated display. A computer generated RGB signal is converted into a YUV signal, which is separated into its Y, U, and V components. The Y component is convolved by averaging a current scan line with a line above and a line below the current scan line so that black lines are lightened and white lines are darkened, thus avoiding flicker. Since convolution is only performed on the Y part of the YUV signal, only two line buffers, each having a width equal to the number of bits in the Y component only, are required.

Abstract: A circuit for converting RGB to composite video. The circuit is particularly useful in a video overlay application. Notch filters are used both in the video path and keying path. The notch filters are centered at frequenices equal to the dot clock frequency of the RGB divided by integers where the result of this division falls within the chroma subcarrier spectrum.

Abstract: A circuit which receives RGB and composite video and provides both RGB and composite merged outputs. Merging of RGB signals occur where the input composite signal is converted to RGB; and also, merging occurs of composite signals where the input RGB is converted to a composite signal. The circuit is particularly useful in a video overlay application. Notch filters are used both in the video path and keying path. The notch filters are centered at frequencies equal to the dot clock frequency of the RGB divided by integers where the result of this division falls within the chroma subcarrier spectrum.

Abstract: A circuit for converting RGB to composite video. The circuit is particularly useful in a video overlay application. Notch filters are used both in the video path and keying path. The notch filters are centered at frequencies equal to the dot clock frequency of the RGB divided by integers where the result of this division falls within the chroma subcarrier spectrum.

Abstract: An enhanced video graphics controller for converting digital signals to a video signal is described. The controller is capable of displaying composite or analog RGB colors as well as providing shades of grey on monochrome displays. The processing of graphics information includes arranging 256 colors into 16 palettes of 16 colors each and is stored in a first memory. Pointers are assigned to each scan line of a frame of a display and these pointers are also stored in the first memory. Data fields which represent bit mapped video data are also stored in the first memory. For each scan line, a corresponding pointer is selected and this pointer selects one of the palettes to be loaded into a second memory. Then data field for that scan line address the second memory to provide color to the stored video data.

Abstract: A detergent composition incorporates a synthetic anionic, nonionic, amphoteric or zwitterionic detergent active compound and a water soluble or dispersible salt of an alkane (C.sub.18 -C.sub.22)-1,2-sulphinic-sulphonic acid or an alkane (C.sub.18 -C.sub.22)-1,2-disulphonic acid detergency builder. The ratio by weight of the detergent active compound to the detergency builder is preferably from about 3:1 to 1:10, for example from about 1:1 to 1:5.