Patents by Inventor Laurence Edward Singleton

Laurence Edward Singleton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7772033
    Abstract: A method for making a semiconductor device includes creating conductive structures on a substrate. Contact pads of a semiconductor die are connected to first ends of conductive structures. The semiconductor die is encapsulated or embedded and the substrate is removed such that second ends of the conductive structures are exposed to the exterior.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: August 10, 2010
    Assignee: Qimonda AG
    Inventors: Juergen Simon, Laurence Edward Singleton
  • Patent number: 7667333
    Abstract: A stack of semiconductor chips includes a substrate or an interposer board comprising conductor structures for electrical connection of the stack and a first chip. The first chip includes an active side with peripherally arranged bonding pads and is mounted face-up on the substrate or the interposer board. The stack beyond includes at least a further chip with peripherally arranged bonding pads on its active side. The back side and at least two chip edges of the further chip are embedded by a mold cap providing a protuberance on the back side of the chip. The protuberance forms a planar surface extending substantially parallel and with a distance to the back side of the chip. The further chip is attached face-up to the active side of the first chip by an adhesive applied between the protuberance and the first chip so that the protuberance is inserted between both chips to provide a gap there. The protuberance has at least one linear dimension that is smaller than a linear dimension of the subjacent chip.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: February 23, 2010
    Assignee: Infineon Technologies AG
    Inventors: Laurence Edward Singleton, Alexander Wollanke, Jesus Mennen Belonio
  • Publication number: 20090085190
    Abstract: A method for making a semiconductor device includes creating conductive structures on a substrate. Contact pads of a semiconductor die are connected to first ends of conductive structures. The semiconductor die is encapsulated or embedded and the substrate is removed such that second ends of the conductive structures are exposed to the exterior.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Juergen Simon, Laurence Edward Singleton
  • Publication number: 20080079150
    Abstract: Die arrangement, having a die with a plurality of electronic circuits electrically coupled to one another, at least one first electrical connection region, having at least one electrical connection, and a first passivation layer, which is applied whilst leaving free at least the one first electrical connection region. A second passivation layer, preferably a molding material, is arranged at least partly on the first passivation layer. At least one electrically conductive structure with a connecting element and a redistribution layer electrically connects the first electrical connection to a second electrical connection, which is formed by or at a section of the redistribution layer. The connecting element extends from the first electrical connection region through the first passivation layer and the second passivation layer, the redistribution layer coupled to the connecting section being arranged at least partly on the second passivation layer.
    Type: Application
    Filed: September 28, 2006
    Publication date: April 3, 2008
    Inventors: Juergen Simon, Laurence Edward Singleton, Jochen Thomas