Patents by Inventor Laurence S. Kaplan
Laurence S. Kaplan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8885467Abstract: A method and system for detecting congestion in a network of nodes, abating the network congestion, and identifying the cause of the network congestion is provided. A congestion detection system may comprise a detection system, an abatement system, and a causation system. The detection system monitors the performance of network components such as the network interface controllers and tiles of routers to determine whether the network is congested such that a delay in delivering packets becomes unacceptable. Upon detecting that the network is congested, an abatement system abates the congestion by limiting the rate at which packets are injected into the network from the nodes. Upon detecting that the network is congested, a causation system may identify the job that is executing on a node that is the cause of the network congestion.Type: GrantFiled: March 9, 2011Date of Patent: November 11, 2014Assignee: Cray Inc.Inventors: Aaron F. Godfrey, Christopher B. Johns, Edwin L. Froese, Matthew P. Kelly, Laurence S. Kaplan, Brent T. Shields
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Publication number: 20130311823Abstract: A resiliency system detects and corrects memory errors reported by a memory system of a computing system using previously stored error correction information. When a program stores data into a memory location, the resiliency system executing on the computing system generates and stores error correction information. When the program then executes a load instruction to retrieve the data from the memory location, the load instruction completes normally if there is no memory error. If, however, there is a memory error, the computing system passes control to the resiliency system (e.g., via a trap) to handle the memory error. The resiliency system retrieves the error correction information for the memory location and re-creates the data of the memory location. The resiliency system stores the data as if the load instruction had completed normally and passes control to the next instruction of the program.Type: ApplicationFiled: May 21, 2012Publication date: November 21, 2013Inventors: Laurence S. Kaplan, Preston P. Briggs, III, Miles A. Ohlrich, Willard H. Leslie
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Patent number: 8386750Abstract: A multiprocessor computer system has a plurality of first processors having a first addressable memory space, and a plurality of second processors having a second addressable memory space. The second addressable memory space is of a different size than the first addressable memory space, and the first addressable memory space and second addressable memory space comprise a part of the same common address space.Type: GrantFiled: October 31, 2008Date of Patent: February 26, 2013Assignee: Cray Inc.Inventors: Michael Parker, Timothy J. Johnson, Laurence S. Kaplan, Steven L. Scott, Robert Alverson, Skef Iterum
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Publication number: 20120230177Abstract: A method and system for detecting congestion in a network of nodes, abating the network congestion, and identifying the cause of the network congestion is provided. A congestion detection system may comprise a detection system, an abatement system, and a causation system. The detection system monitors the performance of network components such as the network interface controllers and tiles of routers to determine whether the network is congested such that a delay in delivering packets becomes unacceptable. Upon detecting that the network is congested, an abatement system abates the congestion by limiting the rate at which packets are injected into the network from the nodes. Upon detecting that the network is congested, a causation system may identify the job that is executing on a node that is the cause of the network congestion.Type: ApplicationFiled: March 9, 2011Publication date: September 13, 2012Inventors: Edwin L. Froese, Christopher B. Johns, Aaron F. Godfrey, Laurence S. Kaplan, Matthew P. Kelly, Brent T. Shields
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Publication number: 20120230212Abstract: A method and system for detecting congestion in a network of nodes, abating the network congestion, and identifying the cause of the network congestion is provided. A congestion detection system may comprise a detection system, an abatement system, and a causation system. The detection system monitors the performance of network components such as the network interface controllers and tiles of routers to determine whether the network is congested such that a delay in delivering packets becomes unacceptable. Upon detecting that the network is congested, an abatement system abates the congestion by limiting the rate at which packets are injected into the network from the nodes. Upon detecting that the network is congested, a causation system may identify the job that is executing on a node that is the cause of the network congestion.Type: ApplicationFiled: March 9, 2011Publication date: September 13, 2012Inventors: Laurence S. Kaplan, Edwin L. Froese, Christopher B. Johns, Matthew P. Kelly, Aaron F. Godfrey, Brent T. Shields
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Publication number: 20120230188Abstract: A method and system for detecting congestion in a network of nodes, abating the network congestion, and identifying the cause of the network congestion is provided. A congestion detection system may comprise a detection system, an abatement system, and a causation system. The detection system monitors the performance of network components such as the network interface controllers and tiles of routers to determine whether the network is congested such that a delay in delivering packets becomes unacceptable. Upon detecting that the network is congested, an abatement system abates the congestion by limiting the rate at which packets are injected into the network from the nodes. Upon detecting that the network is congested, a causation system may identify the job that is executing on a node that is the cause of the network congestion.Type: ApplicationFiled: March 9, 2011Publication date: September 13, 2012Inventors: Aaron F. Godfrey, Christopher B. Johns, Edwin L. Froese, Matthew P. Kelly, Laurence S. Kaplan, Brent T. Shields
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Patent number: 7984453Abstract: An availability system is provided that includes a hierarchy of controllers for providing event notifications relating to availability of components of a scalable MPP system. A controller receives a subscription from a child controller that identifies an event type and a generator. The controller stores in a subscription store an indication that the subscription has been received from the child controller. When a parent controller has not yet been notified of a subscription with a matching event type and generator as indicated by the subscription store, the controller sends the subscription to the parent controller. When the parent controller has already been notified of a subscription with a matching event type and generator as indicated by the subscription store, the controller suppresses the sending of the subscription to the parent controller.Type: GrantFiled: September 18, 2007Date of Patent: July 19, 2011Assignee: Cray Inc.Inventors: Gail A. Alverson, Robert L. Alverson, Daniel C. Duval, Eric A. Hoffman, Laurence S. Kaplan, Matthew Kelly, Kazuya Okubo, Mark Swan, Asaph Zemach
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Publication number: 20100115228Abstract: A multiprocessor computer system has a plurality of first processors having a first addressable memory space, and a plurality of second processors having a second addressable memory space. The second addressable memory space is of a different size than the first addressable memory space, and the first addressable memory space and second addressable memory space comprise a part of the same common address space.Type: ApplicationFiled: October 31, 2008Publication date: May 6, 2010Applicant: CRAY INC.Inventors: Michael Parker, Timothy J. Johnson, Laurence S. Kaplan, Steven L. Scott, Robert Alverson, Skef Iterum
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Patent number: 7428727Abstract: A system for debugging targets using various techniques, some of which are particularly useful in a multithread environment. These techniques include implementing breakpoints using out-of-line instruction emulation so that an instruction replaced with a breakpoint instruction does not need to be returned to its original location for single-step execution, executing a debugger nub for each target as part of the target task but using a nub task thread for the nub execution that is separate from the target task threads, providing immunity from breakpoints for specified threads such as the nub thread via specialized breakpoint handlers used by those threads, and virtualizing the debugger nub such that a shared root nub provides a uniform interface between the debugger and the target while specialized nubs provide differing functionality based on the type of target being debugged.Type: GrantFiled: September 9, 2004Date of Patent: September 23, 2008Assignee: Cray Inc.Inventors: Gail A. Alverson, Burton J. Smith, Laurence S. Kaplan, Mark L. Niehaus
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Publication number: 20080134213Abstract: An availability system is provided that includes a hierarchy of controllers for providing event notifications relating to availability of components of a scalable MPP system. A controller receives a subscription from a child controller that identifies an event type and a generator. The controller stores in a subscription store an indication that the subscription has been received from the child controller. When a parent controller has not yet been notified of a subscription with a matching event type and generator as indicated by the subscription store, the controller sends the subscription to the parent controller. When the parent controller has already been notified of a subscription with a matching event type and generator as indicated by the subscription store, the controller suppresses the sending of the subscription to the parent controller.Type: ApplicationFiled: September 18, 2007Publication date: June 5, 2008Inventors: Gail A. Alverson, Robert L. Alverson, Daniel C. Duval, Eric A. Hoffman, Laurence S. Kaplan, Matthew Kelly, Kazuya Okubo, Mark Swan, Asaph Zemach
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Patent number: 7020767Abstract: A method and system in a multithreaded processor for processing events without interrupt notifications. In one aspect of the present invention, an operating system creates a thread to execute on a stream of the processor. During execution of the thread, the thread executes a loop that determines whether an event has occurred and, in response to determining whether an event has occurred, assigns a different thread to process the event so that multiple events can be processed in parallel and so that interrupts are not needed to signal that the event has occurred. Another aspect of the present invention provides a method and system for processing asynchronously occurring events without interrupt notifications. To achieve this processing, a first thread is executed to generate a notification that the event has occurred upon receipt of the asynchronously occurring event.Type: GrantFiled: February 23, 2001Date of Patent: March 28, 2006Assignee: Cray Inc.Inventors: Gail A. Alverson, Charles David Callahan, II, Susan L. Coatney, Laurence S. Kaplan, Richard D. Korry
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Patent number: 6848097Abstract: A system for debugging targets using various techniques, some of which are particularly useful in a multithread environment. These techniques include implementing breakpoints using out-of-line instruction emulation so that an instruction replaced with a breakpoint instruction does not need to be returned to its original location for single-step execution, executing a debugger nub for each target as part of the target task but using a nub task thread for the nub execution that is separate from the target task threads, providing immunity from breakpoints for specified threads such as the nub thread via specialized breakpoint handlers used by those threads, and virtualizing the debugger nub such that a shared root nub provides a uniform interface between the debugger and the target while specialized nubs provide differing functionality based on the type of target being debugged.Type: GrantFiled: September 18, 2002Date of Patent: January 25, 2005Assignee: Cray Inc.Inventors: Gail A. Alverson, Burton J. Smith, Laurence S. Kaplan, Mark L. Niehaus
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Patent number: 6480818Abstract: A system for debugging targets using various techniques, some of which are particularly useful in a multithread environment. These techniques include implementing breakpoints using out-of-line instruction emulation so that an instruction replaced with a breakpoint instruction does not need to be returned to its original location for single-step execution, executing a debugger nub for each target as part of the target task but using a nub task thread for the nub execution that is separate from the target task threads, providing immunity from breakpoints for specified threads such as the nub thread via specialized breakpoint handlers used by those threads, and virtualizing the debugger nub such that a shared root nub provides a uniform interface between the debugger and the target while specialized nubs provide differing functionality based on the type of target being debugged.Type: GrantFiled: November 13, 1998Date of Patent: November 12, 2002Assignee: Cray Inc.Inventors: Gail A. Alverson, Burton J. Smith, Laurence S. Kaplan, Mark L. Niehaus
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Publication number: 20020038332Abstract: A method and system in a multithreaded processor for processing events without interrupt notifications. In one aspect of the present invention, an operating system creates a thread to execute on a stream of the processor. During execution of the thread, the thread executes a loop that determines whether an event has occurred and, in response to determining whether an event has occurred, assigns a different thread to process the event so that multiple events can be processed in parallel and so that interrupts are not needed to signal that the event has occurred. Another aspect of the present invention provides a method and system for processing asynchronously occurring events without interrupt notifications. To achieve this processing, a first thread is executed to generate a notification that the event has occurred upon receipt of the asynchronously occurring event.Type: ApplicationFiled: February 23, 2001Publication date: March 28, 2002Inventors: Gail A. Alverson, Charles David Callahan, Susan L. Coatney, Laurence S. Kaplan, Richard D. Korry
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Patent number: 6314471Abstract: A method and system in a multithreaded processor for processing events without interrupt notifications. In one aspect of the present invention, an operating system creates a thread to execute on a stream of the processor. During execution of the thread, the thread executes a loop that determines whether an event has occurred and, in response to determining whether an event has occurred, assigns a different thread to process the event so that multiple events can be processed in parallel and so that interrupts are not needed to signal that the event has occurred. Another aspect of the present invention provides a method and system for processing asynchronously occurring events without interrupt notifications. To achieve this processing, a first thread is executed to generate a notification that the event has occurred upon receipt of the asynchronously occurring event.Type: GrantFiled: November 13, 1998Date of Patent: November 6, 2001Assignee: Cray Inc.Inventors: Gail A. Alverson, Charles David Callahan, II, Susan L. Coatney, Laurence S. Kaplan, Richard D. Korry