Patents by Inventor Laurence Stark

Laurence Stark has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230395741
    Abstract: Circuits, methods, and apparatus that can provide detector arrays that are able to avoid or limit saturation of SPAD devices from both ambient and reflected light while maintaining sufficient sensitivity to generate a lidar image. An example can provide a SPAD device having high dynamic range. This SPAD device can include a first cathode for a first diode and a second cathode for a second diode formed in a common anode, where the common anode can be formed of an epitaxial layer. When high sensitivity is desired, both the first diode and the second diode can be biased above their breakdown voltage. When a lower sensitivity is desired, the first diode can be biased above its breakdown voltage while the second diode can be biased below its breakdown voltage. Diode bias voltages can be tuned to steer photogenerated carriers towards the second cathode to further reduce sensitivity.
    Type: Application
    Filed: August 16, 2023
    Publication date: December 7, 2023
    Applicant: Ouster, Inc.
    Inventors: Tarek Al Abbas, Laurence Stark, Neil Calder, Robert Henderson
  • Patent number: 11329185
    Abstract: An embodiment method of manufacturing an avalanche diode includes forming a first trench in a substrate material, filling the first trench with a first material that comprises a dopant, and causing the dopant to diffuse from the first trench to form part of a PN junction. An avalanche diode array can be formed to include a number of the avalanche diodes.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: May 10, 2022
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventor: Laurence Stark
  • Patent number: 11031511
    Abstract: Various embodiments provide a control circuit that includes at least one active module designed to enable an avalanche diode. The control circuit also includes at least one passive module designed to disable the avalanche diode.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: June 8, 2021
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Laurence Stark
  • Publication number: 20210111296
    Abstract: An embodiment method of manufacturing an avalanche diode includes forming a first trench in a substrate material, filling the first trench with a first material that comprises a dopant, and causing the dopant to diffuse from the first trench to form part of a PN junction. An avalanche diode array can be formed to include a number of the avalanche diodes.
    Type: Application
    Filed: December 21, 2020
    Publication date: April 15, 2021
    Inventor: Laurence Stark
  • Patent number: 10978606
    Abstract: The present disclosure relates to an avalanche diode including at least one PN junction; at least one depletion structure located adjacent to the PN junction and configured to form a depletion region; and at least two electrodes to polarize the at least one PN junction.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: April 13, 2021
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Laurence Stark
  • Patent number: 10872995
    Abstract: An embodiment method of manufacturing an avalanche diode includes forming a first trench in a substrate material, filling the first trench with a first material that comprises a dopant, and causing the dopant to diffuse from the first trench to form part of a PN junction. An avalanche diode array can be formed to include a number of the avalanche diodes.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: December 22, 2020
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventor: Laurence Stark
  • Patent number: 10670456
    Abstract: An integrated circuit includes a substrate and at least one photo-voltaic cell implemented on the substrate. The at least one photo-voltaic cell is configured to generate a supply voltage. Circuitry is implemented on the substrate. The circuitry is powered by the supply voltage. The at least one photo-voltaic cell can include a number of series-connected photo-voltaic cells.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: June 2, 2020
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventors: Jeffrey M. Raynor, Laurence Stark, Filip Kaklin
  • Publication number: 20190221704
    Abstract: An embodiment method of manufacturing an avalanche diode includes forming a first trench in a substrate material, filling the first trench with a first material that comprises a dopant, and causing the dopant to diffuse from the first trench to form part of a PN junction. An avalanche diode array can be formed to include a number of the avalanche diodes.
    Type: Application
    Filed: March 28, 2019
    Publication date: July 18, 2019
    Inventor: Laurence Stark
  • Patent number: 10347680
    Abstract: A charge storage cell includes a semiconductor region having charge carriers of a first conductivity type, a first deep trench isolation structure, and a charge storage region located adjacent to the first deep trench isolation structure. The charge storage region has charge carriers of a second conductivity type different to the first conductivity type and extends along substantially all of the first deep trench isolation structure. A second deep trench isolation structure is located adjacent to the charge storage region and opposite the first deep trench isolation structure.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: July 9, 2019
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventor: Laurence Stark
  • Patent number: 10312274
    Abstract: A photosensitive diode has an anode terminal and a cathode terminal. A passive quench resistance circuit includes a resistor with a variable resistance that is controlled by a control signal. The resistor is electrically connected to the cathode terminal. The resistor of the passive quench resistance circuit is formed by a first semiconductor region. The control signal is applied to a control gate of the passive quench resistance circuit. The control gate is formed by a second semiconductor region that is insulated from the first semiconductor region and extends parallel to the first semiconductor region. The voltage of the control signal applied to the control gate controls the variable resistance.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: June 4, 2019
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Laurence Stark
  • Patent number: 10283664
    Abstract: An avalanche diode includes a PN junction with a first deep trench structure adjacent to the PN junction. An area via which photons impinge is provided, the PN junction extending substantially vertically with respect to the area. An avalanche diode array can be formed to include a number of avalanche diodes.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: May 7, 2019
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventor: Laurence Stark
  • Publication number: 20190131479
    Abstract: The present disclosure relates to an avalanche diode including at least one PN junction; at least one depletion structure located adjacent to the PN junction and configured to form a depletion region; and at least two electrodes to polarize the at least one PN junction.
    Type: Application
    Filed: October 11, 2018
    Publication date: May 2, 2019
    Inventor: Laurence STARK
  • Publication number: 20190123215
    Abstract: Various embodiments provide a control circuit that includes at least one active module designed to enable an avalanche diode. The control circuit also includes at least one passive module designed to disable the avalanche diode.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 25, 2019
    Inventor: Laurence STARK
  • Publication number: 20190035830
    Abstract: A charge storage cell includes a semiconductor region having charge carriers of a first conductivity type, a first deep trench isolation structure, and a charge storage region located adjacent to the first deep trench isolation structure. The charge storage region has charge carriers of a second conductivity type different to the first conductivity type and extends along substantially all of the first deep trench isolation structure. A second deep trench isolation structure is located adjacent to the charge storage region and opposite the first deep trench isolation structure.
    Type: Application
    Filed: October 3, 2018
    Publication date: January 31, 2019
    Inventor: Laurence Stark
  • Patent number: 10128292
    Abstract: A method can be used to manufacture a charge storage cell with a first trench and a second trench in a substrate material. The first trench is filled with a doped material. The second trench is filled with a second trench material. The method includes causing the dopant to diffuse from the first trench to thereby provide a doped region adjacent to the first trench. The material from the first and second trenches is removed and at least one of the trenches is filled with a capacitive deep trench isolation material to provide capacitive deep trench isolation.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: November 13, 2018
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventor: Laurence Stark
  • Publication number: 20180195897
    Abstract: An integrated circuit includes a substrate and at least one photo-voltaic cell implemented on the substrate. The at least one photo-voltaic cell is configured to generate a supply voltage. Circuitry is implemented on the substrate. The circuitry is powered by the supply voltage. The at least one photo-voltaic cell can include a number of series-connected photo-voltaic cells.
    Type: Application
    Filed: August 31, 2017
    Publication date: July 12, 2018
    Inventors: Jeffrey M. Raynor, Laurence Stark, Filip Kaklin
  • Patent number: 10021334
    Abstract: An embodiment circuit includes a first source follower configured to be controlled by a voltage at a first node, a photodiode controllably coupled to the first node, and a bias transistor configured to be controlled by a bias voltage. The bias transistor has a first terminal coupled to an output of the first source follower. The circuit additionally includes a storage node controllably coupled to the output of the first source follower, and an amplifier controllably coupled between the storage node and an output line. Also included in the circuit is a controllable switching element configured to couple a second terminal of the bias transistor to a supply voltage in response to a pixel operating in a first mode, and to couple the second terminal of the bias transistor to the output line in response to the pixel operating in a second mode.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: July 10, 2018
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventor: Laurence Stark
  • Publication number: 20180166496
    Abstract: A method can be used to manufacture a charge storage cell with a first trench and a second trench in a substrate material. The first trench is filled with a doped material. The second trench is filled with a second trench material. The method includes causing the dopant to diffuse from the first trench to thereby provide a doped region adjacent to the first trench. The material from the first and second trenches is removed and at least one of the trenches is filled with a capacitive deep trench isolation material to provide capacitive deep trench isolation.
    Type: Application
    Filed: June 29, 2017
    Publication date: June 14, 2018
    Inventor: Laurence Stark
  • Patent number: 9966399
    Abstract: A pixel is formed by two or more photodiodes and at least one transfer gate. The transfer gate is configured to transfer charge from each of the photodiodes to a common sense node, such that charge from the photodiodes is combined at the common sense node.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: May 8, 2018
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Laurence Stark
  • Publication number: 20180108799
    Abstract: An avalanche diode includes a PN junction with a first deep trench structure adjacent to the PN junction. An area via which photons impinge is provided, the PN junction extending substantially vertically with respect to the area. An avalanche diode array can be formed to include a number of avalanche diodes.
    Type: Application
    Filed: May 31, 2017
    Publication date: April 19, 2018
    Inventor: Laurence Stark