Abstract: Display units (1) comprise selection circuitry (40) for selecting a line (41, 45, 49) during a period of a first duration. As a result, this period must be chosen equal to the duration to the smallest data pulse, and relatively high clock frequency is to be used for the selection circuitry (40). By introducing means (30, 60, 70, 80, 90) for supplying a data signal comprising a pulse of a second duration which is different from a first duration of a selection signal for selecting a line (41, 45, 49), now a data signal can be supplied to a pixel independently from the clock frequency of the selection circuitry (40). As a result, the selection circuitry (40) can be operated at a relatively low clock frequency, which reduces the power consumption. Preferably, the second duration is shorter than the first duration, and the means comprise common electrode circuitry (60), storage capacitor circuitry (70), and circuitry (80, 90) to be added to the selection circuitry (40) and the data circuitry (30).