Patents by Inventor Laurent Morichetti

Laurent Morichetti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9354944
    Abstract: A method for executing a plurality of data-parallel threads of a processing logic on a processor core includes grouping the plurality of data-parallel threads into one or more workgroups, associating a first workgroup from the one or more workgroups with an operating system thread on the processor core, and configuring threads from the first workgroup as user-level threads within the operating system thread. In an example, a method enables the execution of GPU-kernels that has been previously configured for a GPU, to execute on a CPU such as a multi-core CPU. The mapping of the numerous data-parallel threads to the CPU is done in such a manner as to reduce the number of costly operating system threads instantiated on the CPU, and to enable efficient debugging.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: May 31, 2016
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Benedict Gaster, Jayanth Gummaraju, Laurent Morichetti
  • Publication number: 20120036301
    Abstract: Techniques are disclosed relating to distributing workloads between processors and/or processing elements. A computer system having at least first and second processing elements may cause a request to initialize one or more memory regions to be handled by the second processing element. Initialization may be accomplished by the second processing element directly accessing a memory that includes the specified memory region to be initialized. Thus, while the second processing element is causing the memory region to be initialized, the first processing element is free to perform other computational tasks. A cache associated with the first processing element may be undisturbed as a result of the second processing element performing the initialization, which may avoid displacement of data from the cache.
    Type: Application
    Filed: August 3, 2010
    Publication date: February 9, 2012
    Inventors: Eric R. Caspole, Laurent Morichetti
  • Publication number: 20110022817
    Abstract: A method for executing a plurality of data-parallel threads of a processing logic on a processor core includes grouping the plurality of data-parallel threads into one or more workgroups, associating a first workgroup from the one or more workgroups with an operating system thread on the processor core, and configuring threads from the first workgroup as user-level threads within the operating system thread. In an example, a method enables the execution of GPU-kernels that has been previously configured for a GPU, to execute on a CPU such as a multi-core CPU. The mapping of the numerous data-parallel threads to the CPU is done in such a manner as to reduce the number of costly operating system threads instantiated on the CPU, and to enable efficient debugging.
    Type: Application
    Filed: July 27, 2009
    Publication date: January 27, 2011
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Benedict GASTER, Jayanth Gummaraju, Laurent Morichetti
  • Patent number: 7577951
    Abstract: The present invention, in various embodiments, provides techniques for improving performance of programs. In one embodiment, the program is written in the Java language and runs in the Java Runtime Environment (JRE) that includes a Java Virtual Machine (JVM) having a configuration. A control panel having access to the JVM is invoked. Via the control panel, a user observes the execution of the Java program, analyzes the results of the execution, changes the configuration of the JVM, and forces re-optimization of the critical portions of the running program. By repeating the above steps of observing the program execution, analyzing the results, changing the configuration of the Java machine, and forcing re-optimization of the critical portions of the program, the user improves the program's overall performance.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: August 18, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Noubar Partamian, Laurent Morichetti, Amitabh Nene, Andrew Trick
  • Patent number: 7062755
    Abstract: Techniques are provided for recovering from compilation errors in environments that use dynamic compilers. Application programs include Java bytecodes, and compilation includes sequential invocation of separate compilation phases on a region of bytecodes. If compilation of a region results in a fatal error, then the compiler identifies the “failed” phase. If the failed phase is a non-essential phase, then the compiler attempts to re-compile the region after skipping the failed phase. However, if the failed phase is essential, then the compiler attempts to replace that failed phase with a simpler version. Nevertheless, if the fatal error cannot be avoided or the compiler is unable to replace the failed phase with a simpler version, then the compiler prevents compilation of the code encompassing the fatal error in future attempts.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: June 13, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Noubar Partamian, Laurent Morichetti, Amitabh Nene, Andrew Trick
  • Publication number: 20040078687
    Abstract: Techniques are provided for recovering from compilation errors in environments that use dynamic compilers. Application programs include Java bytecodes, and a compiler is arranged into a plurality of compilation phases. Each phase implements a specific compiler optimization that contributes towards the total performance of the compiled code. In effect, compilation includes sequential invocation of separate compilation phases on a region of bytecodes. If compilation of a particular region results in a fatal error, then the compiler identifies the compilation phase that generated the error, which is referred to as the “failed” phase. If the failed phase is a nonessential phase, then the compiler attempts to re-compile the region after skipping the failed phase. However, if the failed phase is essential for compilation and/or contributes significantly towards the performance of the compiled code, then the compiler attempts to replace that failed phase with a simpler version.
    Type: Application
    Filed: October 16, 2002
    Publication date: April 22, 2004
    Inventors: Noubar Partamian, Laurent Morichetti, Amitabh Nene, Andrew Trick
  • Publication number: 20030225917
    Abstract: The present invention, in various embodiments, provides techniques for improving performance of programs. In one embodiment, the program is written in the Java language and runs in the Java Runtime Environment (JRE) that includes a Java Virtual Machine (JVM) having a configuration. A control panel having access to the JVM is invoked. Via the control panel, a user observes the execution of the Java program, analyzes the results of the execution, changes the configuration of the JVM, and forces re-optimization of the critical portions of the running program. By repeating the above steps of observing the program execution, analyzing the results, changing the configuration of the Java machine, and forcing re-optimization of the critical portions of the program, the user improves the program's overall performance.
    Type: Application
    Filed: May 30, 2002
    Publication date: December 4, 2003
    Inventors: Noubar Partamian, Laurent Morichetti, Amitabh Nene, Andrew Trick