Patents by Inventor Laurent Schwartz
Laurent Schwartz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12266613Abstract: A support substrate has a mounting face and a connection face opposite to the mounting face. An electronic chip is mounted to the mounting face and a matrix of connectors is mounted to the connection face. The support substrate includes an interconnection structure formed by a pair of conductive interconnection tracks that electrically connect the electronic chip to the matrix of connectors and circulate differential signals. The two interconnection tracks of the pair of conductive interconnection tracks extend facing each other at different depths of the support substrate. An isolation structure in the support substrate laterally isolates the pair of conductive interconnection tracks. Isolation plates above and below the pair of conductive interconnection tracks provide further isolation.Type: GrantFiled: June 23, 2022Date of Patent: April 1, 2025Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Claire Laporte, Laurent Schwartz, Godfrey Dimayuga
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Publication number: 20240413043Abstract: Systems, apparatuses, and method for nanowires for semiconductor packages are provided herein. The semiconductor package may include die attached to a substrate. A lid may also be attached to the substrate. The die includes die nanowires and the lid includes lid nanowires. The nanowires may be formed over the entirety of the die or in a pattern. The lid may have a corresponding or symmetrical coverage or pattern. In the semiconductor package, the die nanowires and the lid nanowires are coupled to, among other things, provide improved heat dissipation.Type: ApplicationFiled: June 9, 2023Publication date: December 12, 2024Inventors: Romain COFFY, Laurent Schwartz, Ludovic Fourneaud
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Patent number: 12051681Abstract: A device for regulating a voltage of an electric current supplying an integrated circuit resting on a substrate. The integrated circuit comprises a ground terminal and a power supply terminal able to receive the electric current. The regulation device comprises a first cover covering the integrated circuit, a second cover covering the integrated circuit. The first cover is electrically connected to the power supply terminal of the integrated circuit. The second cover is electrically connected to the ground terminal of the integrated circuit. The first cover and the second cover are connected together by a capacitive connection.Type: GrantFiled: July 13, 2021Date of Patent: July 30, 2024Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (ALPS) SASInventors: Deborah Cogoni, David Auchere, Laurent Schwartz, Claire Laporte
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Publication number: 20240186679Abstract: A waveguide has a first input/output for receiving/outputting a radio frequency (RF) wave and guiding the RF wave between the first input/output and a second input/output. An electronic integrated circuit chip is electrically connected at a front face to a metal level of a carrier substrate which includes a patch antenna. An electrically insulating embedding material surrounds the electronic chip and is disposed between the patch antenna and the first input/output of the waveguide which is at least in contact with the embedding material. The electronic chip cooperates electrically with the patch antenna so as to cause the patch antenna to transmit the RF wave to the first input/output through the embedding material. The electronic chip also processes an electrical signal from the patch antenna in response to the patch antenna receiving the radio frequency wave output by the first input/output via the embedding material.Type: ApplicationFiled: December 1, 2023Publication date: June 6, 2024Applicant: STMicroelectronics International N.V.Inventors: Romain COFFY, Laurent SCHWARTZ, Ludovic FOURNEAUD
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Publication number: 20240044385Abstract: A motor sub-assembly for an electromechanical brake actuator of an aircraft wheel includes a casing, a shaft mounted in the casing, and an electric motor mounted in the casing rotate the shaft, the shaft having an end connected to a screw-and-nut assembly to exert a force on a stack of disks for braking the aircraft wheel. The shaft has a first set of teeth and the motor sub-assembly has a shuttle mounted to slide relative to the casing and provided with a second set of teeth. The motor sub-assembly includes a selector mechanism that moves the shuttle selectively between first and second positions in which the first set of teeth is engaged and disengaged with the second set of teeth, respectively. The motor sub-assembly includes a holder device that holds the shuttle in the first position and a locking device that continuously prevents the shuttle from rotating relative to the casing.Type: ApplicationFiled: December 1, 2021Publication date: February 8, 2024Applicant: SAFRAN LANDING SYSTEMSInventors: Nathanael RICHARD, Romain PRESLE, Laurent SCHWARTZ, Mathieu GENGOUX
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Patent number: 11756874Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.Type: GrantFiled: September 15, 2022Date of Patent: September 12, 2023Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: David Auchere, Claire Laporte, Deborah Cogoni, Laurent Schwartz
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Patent number: 11676928Abstract: An integrated circuit chip includes a front face having an electrical connection pad. An overmolded encapsulation block encapsulates the integrated circuit chip and includes a front layer at least partially covering a front face of the integrated circuit chip. A through-hole the encapsulation block is located above the electrical connection pad of the integrated circuit chip. A wall of the through-hole is covered with an inner metal layer that is joined to the front pad of the integrated circuit chip. A front metal layer covers a local zone of the front face of the front layer, with the front metal layer being joined to the inner metal layer to form an electrical connection. The inner metal layer and the front metal layer are attached or anchored to activated additive particles that are included in the material of the encapsulation block.Type: GrantFiled: August 6, 2021Date of Patent: June 13, 2023Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Romain Coffy, Patrick Laurent, Laurent Schwartz
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Publication number: 20230069969Abstract: A package for integrated circuits includes a base substrate having a mounting face. A first electronic chip has a top face electrically connected to the mounting face and a bottom face mounted to the mounting face by an adhesive layer. A second electronic chip has a bottom face covered with a thermal interface layer and a top face electrically connected to the mounting face. A heat sink includes a first part embedded in the adhesive layer, a second part having a bottom face in contact with the layer of thermal interface material and a top face, and a connection part between the first part and the second part. A coating encapsulates the first and second electronic chips and the heat sink. The top face of the second part of the heat sink exposed from the encapsulating coating.Type: ApplicationFiled: September 6, 2022Publication date: March 9, 2023Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Younes BOUTALEB, Laurent SCHWARTZ
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Publication number: 20230015669Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.Type: ApplicationFiled: September 15, 2022Publication date: January 19, 2023Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: David AUCHERE, Claire LAPORTE, Deborah COGONI, Laurent SCHWARTZ
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Publication number: 20220415822Abstract: A support substrate has a mounting face and a connection face opposite to the mounting face. An electronic chip is mounted to the mounting face and a matrix of connectors is mounted to the connection face. The support substrate includes an interconnection structure formed by a pair of conductive interconnection tracks that electrically connect the electronic chip to the matrix of connectors and circulate differential signals. The two interconnection tracks of the pair of conductive interconnection tracks extend facing each other at different depths of the support substrate. An isolation structure in the support substrate laterally isolates the pair of conductive interconnection tracks. Isolation plates above and below the pair of conductive interconnection tracks provide further isolation.Type: ApplicationFiled: June 23, 2022Publication date: December 29, 2022Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Claire LAPORTE, Laurent SCHWARTZ, Godfrey DIMAYUGA
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Patent number: 11482487Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.Type: GrantFiled: October 6, 2020Date of Patent: October 25, 2022Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: David Auchere, Claire Laporte, Deborah Cogoni, Laurent Schwartz
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Publication number: 20220181316Abstract: Electronic chip comprising a first integrated circuit, a second integrated circuit, a first link connecting the first integrated circuit and the second integrated circuit, a second link connecting the first integrated circuit and the second integrated circuit, a surface-mount component, the component being configured and placed to limit an electromagnetic disturbance by the first link of the second link.Type: ApplicationFiled: December 1, 2021Publication date: June 9, 2022Inventors: Jeremie Forest, Vincent Knopik, Laurent Schwartz
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Patent number: 11319058Abstract: A system for controlling an electromechanical actuator of an aircraft includes a locking device configured to mechanically lock said actuator in a first fixed position and to mechanically unlock said actuator from said first fixed position and a controller configured to be in bi-directional communication with both said locking device and said actuator. The controller is configured to monitor a position of said actuator during flight and to detect when said actuator has not moved for a set amount of time, said controller further being configured to instruct said locking device to lock said actuator in said first, locked position when said set time has been reached. In addition, there is provided a method for controlling the thermal properties of an electromechanical actuator of an aircraft.Type: GrantFiled: December 17, 2018Date of Patent: May 3, 2022Assignee: GOODRICH ACTUATION SYSTEMS SASInventors: Jerome Socheleau, Laurent Schwartz
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Publication number: 20220028844Abstract: A device for regulating a voltage of an electric current supplying an integrated circuit resting on a substrate. The integrated circuit comprises a ground terminal and a power supply terminal able to receive the electric current. The regulation device comprises a first cover covering the integrated circuit, a second cover covering the integrated circuit. The first cover is electrically connected to the power supply terminal of the integrated circuit. The second cover is electrically connected to the ground terminal of the integrated circuit. The first cover and the second cover are connected together by a capacitive connection.Type: ApplicationFiled: July 13, 2021Publication date: January 27, 2022Applicants: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (ALPS) SASInventors: Deborah COGONI, David AUCHERE, Laurent SCHWARTZ, Claire Laporte
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Publication number: 20210366865Abstract: An integrated circuit chip includes a front face having an electrical connection pad. An overmolded encapsulation block encapsulates the integrated circuit chip and includes a front layer at least partially covering a front face of the integrated circuit chip. A through-hole the encapsulation block is located above the electrical connection pad of the integrated circuit chip. A wall of the through-hole is covered with an inner metal layer that is joined to the front pad of the integrated circuit chip. A front metal layer covers a local zone of the front face of the front layer, with the front metal layer being joined to the inner metal layer to form an electrical connection. The inner metal layer and the front metal layer are attached or anchored to activated additive particles that are included in the material of the encapsulation block.Type: ApplicationFiled: August 6, 2021Publication date: November 25, 2021Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Romain COFFY, Patrick LAURENT, Laurent SCHWARTZ
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Patent number: 11114404Abstract: An integrated circuit chip includes a front face having an electrical connection pad. An overmolded encapsulation block encapsulates the integrated circuit chip and includes a front layer at least partially covering a front face of the integrated circuit chip. A through-hole the encapsulation block is located above the electrical connection pad of the integrated circuit chip. A wall of the through-hole is covered with an inner metal layer that is joined to the front pad of the integrated circuit chip. A front metal layer covers a local zone of the front face of the front layer, with the front metal layer being joined to the inner metal layer to form an electrical connection. The inner metal layer and the front metal layer are attached or anchored to activated additive particles that are included in the material of the encapsulation block.Type: GrantFiled: December 5, 2019Date of Patent: September 7, 2021Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Romain Coffy, Patrick Laurent, Laurent Schwartz
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Publication number: 20210104457Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.Type: ApplicationFiled: October 6, 2020Publication date: April 8, 2021Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: David AUCHERE, Claire LAPORTE, Deborah COGONI, Laurent SCHWARTZ
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Publication number: 20200335466Abstract: A bumping matrix includes many bumps, wherein each bump is rotationally asymmetric in a plane of the bumping matrix. The bumps are orientated in a centripetal arrangement. Bumps in a first portion of the bumping matrix have a first pitch in a first axis and bumps in a second portion of the bumping matrix have a second pitch in the first axis. The second pitch is different from the first pitch. Bumps have an oblong shape with a longer diameter and a shorter diameter. The centripetal arrangement orients the longer diameter of the bumps is a direction radially extending from a center of the bumping matrix.Type: ApplicationFiled: April 14, 2020Publication date: October 22, 2020Applicants: STMicroelectronics (Alps) SAS, STMicroelectronics (Grenoble 2) SASInventors: Laurent SCHWARTZ, David KAIRE, Jerome LOPEZ
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Publication number: 20200194397Abstract: An integrated circuit chip includes a front face having an electrical connection pad. An overmolded encapsulation block encapsulates the integrated circuit chip and includes a front layer at least partially covering a front face of the integrated circuit chip. A through-hole the encapsulation block is located above the electrical connection pad of the integrated circuit chip. A wall of the through-hole is covered with an inner metal layer that is joined to the front pad of the integrated circuit chip. A front metal layer covers a local zone of the front face of the front layer, with the front metal layer being joined to the inner metal layer to form an electrical connection. The inner metal layer and the front metal layer are attached or anchored to activated additive particles that are included in the material of the encapsulation block.Type: ApplicationFiled: December 5, 2019Publication date: June 18, 2020Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Romain COFFY, Patrick LAURENT, Laurent SCHWARTZ
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Patent number: 10421532Abstract: A connecting rod assembly for a flight control surface actuation system, the assembly comprising a connecting rod for connecting a flight control surface to a rotary actuator and a position sensor mounted to the connecting rod for sensing the position of the connecting rod relative to a rotary actuator.Type: GrantFiled: November 5, 2015Date of Patent: September 24, 2019Assignee: GOODRICH ACTUATION SYSTEMS SASInventor: Laurent Schwartz