Abstract: In accordance with the invention, there are methods for making and there is an integrated circuit comprising a semiconductor substrate comprising device elements and a metallization layer interconnecting the device elements and having an uppermost layer. The integrated circuit can also include a protective overcoat formed over the metallization layer, the protective overcoat having a plurality of patterned regions that expose portions of the metallization layer, a first conductive layer formed on the protective overcoat, and a dielectric layer formed over the first conductive layer. The integrated circuit can further include a second conductive layer formed over the dielectric layer and a plurality of sidewall spacers contacting end portions of the first conductive layer.

Abstract: The present invention provides an interconnect for use in an integrated circuit, a method for manufacturing the interconnect, and a method for manufacturing an integrated circuit including the interconnect. The interconnect (100), among other elements, includes a surface conductive lead (160) located in an opening formed within a protective overcoat (110), and a barrier layer (140) located between the protective overcoat (110) and the surface conductive lead (160), a portion of the barrier layer (140) forming a skirt (145) that extends outside a footprint of the surface conductive lead (160).

Abstract: The present invention relates to integrated circuits comprising a protective overcoat and thick copper connectors. According to one aspect of the inventions, vias in the protective overcoat are substantially filled with tungsten plugs, or plugs of another metal with a relatively low coefficient of thermal expansion. According to another aspect of the invention, large vias in the protective overcoat are replaced with arrays of smaller vias. The invention reduces the likelihood of device failures during temperature cycling tests. Also, the invention allows for smaller vias in the protective overcoat and removal of interconnect functions to the thick copper layer.

Abstract: A method of separating wafers, such as those used for semiconductor device manufacture, into die. A partly fabricated wafer is covered with a protective coating over its top surface (10). The wafer is then inscribed to define separation lines between die, with the separation lines being of a predetermined depth (12). The protective coating is then removed (14), and at least one processing step is performed at the wafer level (15, 22-24), before the inscribed wafer is separated into die. Then, the wafer is separated into die along the separation lines (17).