Patents by Inventor Laurinda W. Ng

Laurinda W. Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7541275
    Abstract: The present invention provides an interconnect for use in an integrated circuit, a method for manufacturing the interconnect, and a method for manufacturing an integrated circuit including the interconnect. The interconnect (100), among other elements, includes a surface conductive lead (160) located in an opening formed within a protective overcoat (110), and a barrier layer (140) located between the protective overcoat (110) and the surface conductive lead (160), a portion of the barrier layer (140) forming a skirt (145) that extends outside a footprint of the surface conductive lead (160).
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: June 2, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Betty Shu Mercer, Erika Leigh Shoemaker, Byron Lovell Williams, Laurinda W. Ng, Alec J. Morton, C. Matthew Thompson
  • Patent number: 6657832
    Abstract: The present invention includes an integrated circuit switch including a membrane supported over a first conductor on a substrate, a conductive region on the membrane and connecting to the first conductor on the substrate, a pulldown electrode on the substrate and under the membrane and a pillar to support the membrane after the pulldown threshold has been reached. A voltage greater than a pulldown threshold is applied between the membrane and the pulldown electrode will pull the membrane down to make a capacitive coupling to the first conductor. The addition of the pillars increases the upward restoring force when the activation voltage is removed.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: December 2, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Bryon L. Williams, Laurinda W. Ng, Darius L. Crenshaw, Jose L. Melendez
  • Publication number: 20020179421
    Abstract: The present invention includes an integrated circuit switch including a membrane supported over a first conductor on a substrate, a conductive region on the membrane and connecting to the first conductor on the substrate, a pulldown electrode on the substrate and under the membrane and a pillar to support the membrane after the pulldown threshold has been reached. A voltage greater than a pulldown threshold is applied between the membrane and the pulldown electrode will pull the membrane down to make a capacitive coupling to the first conductor. The addition of the pillars increases the upward restoring force when the activation voltage is removed.
    Type: Application
    Filed: April 26, 2001
    Publication date: December 5, 2002
    Inventors: Byron L. Williams, Laurinda W. Ng, Darius L. Crenshaw, Jose L. Melendez