Abstract: An example method includes: obtaining sinusoidal signals comprising components of a first time-domain signal; shifting phases of the sinusoidal signals by amounts corresponding to a specified time-shift to produce phase-shifted signals, and converting the phase-shifted signals to the time domain to produce time-shifted signals. The shifting may be performed to more closely align an envelope of the first time-domain signal with an envelope of a second time-domain signal.

Abstract: An example method includes: obtaining sinusoidal signals comprising components of a first time-domain signal; shifting phases of the sinusoidal signals by amounts corresponding to a specified time-shift to produce phase-shifted signals, and converting the phase-shifted signals to the time domain to produce time-shifted signals. The shifting may be performed to more closely align an envelope of the first time-domain signal with an envelope of a second time-domain signal.

Abstract: A test system that provides an output signal for analysis without requiring the test hardware to be idle during a settling interval. The test system includes a preprocessor that identifies the near-DC drift that occurs in the output signal and then adjusts the output signal to remove the near-DC drift. A set of values representing the near-DC drift at each of multiple times during the acquisition of a signal for analysis may be computed and used to model a settling profile of the signal by fitting a curve to the set of values. The model of the settling profile may then be subtracted from samples representing the output signal to provide an adjusted signal for further analysis.

Abstract: A test system that provides an output signal for analysis without requiring the test hardware to be idle during a settling interval. The test system includes a preprocessor that identifies the near-DC drift that occurs in the output signal and then adjusts the output signal to remove the near-DC drift. A set of values representing the near-DC drift at each of multiple times during the acquisition of a signal for analysis may be computed and used to model a settling profile of the signal by fitting a curve to the set of values. The model of the settling profile may then be subtracted from samples representing the output signal to provide an adjusted signal for further analysis.

Abstract: A system and method for EVM self-testing a communication device is provided including receiving (305) a complex waveform, sampling (310) first and second sample voltages from the complex waveform, selecting (315) first and second ideal voltages from I- and Q-arrays, and determining (320) an error vector by comparing the first and second sample voltages with the first and second ideal voltages for a desired number of comparisons (N). The first ideal voltage corresponds with the first sample voltage, the second ideal voltage corresponds with the second sample voltage, and the I- and Q-arrays are derived from a conversion of a bitstream to the complex waveform.

Abstract: A digital interface (22) includes a self-test structure (56). The structure (56) includes a transmit section (52) and a receive section (36) having a correlator (68). A method (114) of testing the interface (22) entails coupling the receive section (36) with the transmit section (52) and communicating a test data structure (86) from the transmit section (52) to the receive section (36) at a high data rate. The test data structure (86) includes a pre-defined sync pattern (88), a header (90), and a payload (92). The receive section (36) detects the sync pattern (88) and performs time frame synchronization (148) at the correlator (68). When synchronization (148) is successful, the receive section (36) decodes (154, 162) the header (90) and the payload (92). If time frame synchronization (148) and decoding (154, 162) are successful, a validation indicator (100) is output for external observation at a low data rate.

Abstract: A system and method for EVM self-testing a communication device is provided including receiving (305) a complex waveform, sampling (310) first and second sample voltages from the complex waveform, selecting (315) first and second ideal voltages from I- and Q-arrays, and determining (320) an error vector by comparing the first and second sample voltages with the first and second ideal voltages for a desired number of comparisons (N). The first ideal voltage corresponds with the first sample voltage, the second ideal voltage corresponds with the second sample voltage, and the I- and Q-arrays are derived from a conversion of a bitstream to the complex waveform.