Abstract: A method and apparatus are provided, the method and apparatus comprising running a plurality of identical programs on a plurality of identical computers and recording information about at least some state updates done within each of the plurality of the identical programs running on the plurality of the identical computers using a plurality of digests of the at least some state updates. The method and apparatus also comprises comparing the plurality of the digests to determine whether at least one of the plurality of the identical programs running on the plurality of the identical computers has failed.

Abstract: Embodiments of the invention are generally directed to operation of a media interface to provide bidirectional communications. An embodiment of a method includes connecting a first device to a second device via a media interface, the media interface including a communication channels for unidirectional data transmission, the media interface being in compliance with a media protocol. The method further provides for configuring the first device and the second device for bidirectional data transmission, the bidirectional data transmission being conducted according to a network protocol, and transmitting bidirectional data between the first device and the second device via the media interface.

Abstract: An apparatus, system and method for detecting errors in a physical interface during the transmission and/or receipt of data communications between integrated circuits (“ICs”) are disclosed. In one embodiment, an apparatus is configured to operate as or within a receiving physical interface. The apparatus includes a decoder configured to decode a subset of encoded data bits to yield decoded data bits. It also includes a physical interface (“PI”) error detection bit extractor configured to extract a physical interface error detection bit from the decoded data bits. As such, the apparatus uses the physical interface error detection bit to determine whether the encoded data bits include at least one erroneous data bit as an error. In some embodiments, the apparatus includes an error detector configured to operate within a physical layer. In at least one embodiment, the apparatus efficiently transmits error detection codes within, for example, an NB/(N+1)B line coder.

Abstract: A method and apparatus are provided, the method and apparatus comprising sending an output of a free-running counter to a comparator for a clock shaper logic unit, the free-running counter incremented every time a double-speed clock rises for an on-chip system and sending at least one input from a central processing unit (CPU) to the comparator for the clock shaper logic unit, the at least one input specifying a desired frequency. The method and apparatus also comprises producing a central processing unit (CPU) clock in the clock shaper logic unit based on the output of the free-running counter and the at least one input specifying the desired frequency by comparing a bit-reversed version of the output of the free-running counter with the at least one input specifying the desired frequency.

Abstract: A system-on-a-chip device is provided, the system-on-a-chip device comprising an on-chip processor and an on-chip dynamic random access memory (DRAM) capable of communicating with the on-chip processor. The system-on-a-chip device also comprises at least one on-chip input/output (I/O) bus capable of communicating with the on-chip processor and the on-chip dynamic random access memory (DRAM).

Abstract: A method is provided, the method comprising collecting related signals capable of having unrelated names into a Krutibus, defining a bus capable of connecting the related signals in a bus definition file in the Krutibus and providing at least one of component declarations of the bus and different uses of the bus in a hardware description language (HDL) circuit description using the bus definition file in the Krutibus. The method also comprises providing a Krutibus preprocessor to read the hardware description language (HDL) circuit description for the at least one of the component declarations of the bus and the different uses of the bus and to generate a hardware description language (HDL) circuit description naming the bus components.

Abstract: A method and apparatus are provided, the method and apparatus comprising running a plurality of identical programs on a plurality of identical computers and recording information about at least some state updates done within each of the plurality of the identical programs running on the plurality of the identical computers using a plurality of digests of the at least some state updates. The method and apparatus also comprises comparing the plurality of the digests to determine whether at least one of the plurality of the identical programs running on the plurality of the identical computers has failed.

Abstract: A method and apparatus are provided, the method and apparatus comprising sending an output of a free-running counter to a comparator for a clock shaper logic unit, the free-running counter incremented every time a double-speed clock rises for an on-chip system and sending at least one input from a central processing unit (CPU) to the comparator for the clock shaper logic unit, the at least one input specifying a desired frequency. The method and apparatus also comprises producing a central processing unit (CPU) clock in the clock shaper logic unit based on the output of the free-running counter and the at least one input specifying the desired frequency by comparing a bit-reversed version of the output of the free-running counter with the at least one input specifying the desired frequency.

Abstract: A method and apparatus are provided. The method and apparatus include determining a plurality of first file digests corresponding to a plurality of files in a file system and providing a directory of the plurality of first file digests.

Abstract: A method is provided, the method comprising collecting related signals capable of having unrelated names into a Krutibus, defining a bus capable of connecting the related signals in a bus definition file in the Krutibus and providing at least one of component declarations of the bus and different uses of the bus in a hardware description language (HDL) circuit description using the bus definition file in the Krutibus. The method also comprises providing a Krutibus preprocessor to read the hardware description language (HDL) circuit description for the at least one of the component declarations of the bus and the different uses of the bus and to generate a hardware description language (HDL) circuit description naming the bus components.

Abstract: A system-on-a-chip device is provided, the system-on-a-chip device comprising an on-chip processor and an on-chip dynamic random access memory (DRAM) capable of communicating with the on-chip processor. The system-on-a-chip device also comprises at least one on-chip input/output (I/O) bus capable of communicating with the on-chip processor and the on-chip dynamic random access memory (DRAM).

Abstract: The invention provides a method and apparatus for management of communications over media of finite bandwidth. One embodiment of the invention allows management of communications comprising a plurality of data streams from a plurality of sources. One embodiment of the invention effectively quantifies and controls data streams comprising data transferred at either regular or irregular data rates. One embodiment of the invention provides for estimation of data rate needs, measurement and analysis of current and historical data rate parameters, dynamic allocation of available bandwidth, and supports cooperation between data sources and destinations in the management processes.

Abstract: In a system of multiple computers connected by a network means, a method for using multiple input styli, each connected to an individual computer, to indicate input information on the display screen of any computer in the system. In a system in which there are many computers, a user of one computer may wish to indicate an input action on a second computer. In the present invention, all pens in a system are able to determine which computer they are writing on and an input position relative to that input computer, regardless of whether they belong to that computer, by determining an identifying "signature" of the computer based on the peak signal strength of a plurality of distinguishable signals in a complex signal produced on the computer display screen and sensed by the stylus. Each stylus is able to communicate with the software entity which can correctly interpret the measurement by using a computer network.

Abstract: Near field coupling is employed for transferring data back and forth between base stations and portable stations in cellular communication systems, such as cellular local area networks.