Abstract: A test and maintenance system for use with a data processing system comprising a specialized circuit set wherein the circuit set registers can be configured into a serial array, a clock signal distribution system capable of delivering controlled clock signals to selected serial arrays, a maintenance data processor for providing predetermined signal groups, and addressing apparatus responsive to the predetermined signal groups for loading and unloading register arrays in response to the predetermined signals. The disclosed apparatus permits a predetermined signal group to be entered into the serial register array, a predetermined number of clock cycles (i.e. series of operations performed on the data), and the resulting signals shifted from the serial register array and signals applies to data processing unit for display of analysis.

Abstract: A specialized circuit set is included in a data processing system wherein the circuit set registers can be configured into a serial array. A clock signal distribution system delivers controlled clock signals to selected serial arrays. A maintenance data processor provides predetermined signal groups and addressing apparatus responsive to the predetermined signal groups loads and unloads register arrays in response to the predetermined signals. A predetermined signal group is entered into the serial register array, a predetermined number of clock cycles are applied, and the resulting signals shifted from the serial register array are applied to the maintenance data processor for display or analysis. By comparing the expected result for a given initial state with the actual result of an operation sequence, the accuracy of the operation of the data processing system, or any portion thereof, is thereby determined.