Abstract: Systems, methods, and device are provided for program stack handling. One method embodiment includes recognizing that a fault has occurred because a particular address range in a memory stack has been accessed. The method includes evaluating a current utilized size of regions in the memory stack. A particular address range between the current utilized size of regions in the memory stack is then relocated.

Abstract: An embodiment of the invention provides an apparatus and a method for avoidance of a masked signal trap loop. The apparatus and method perform acts including: terminating a process of an application and generating a core dump file, if parameters are set in an error detection engine and a signal is masked when a coding error is encountered in the application.

Abstract: In a multitasking computer system, data is preloaded into cache memory upon the occurrence of a context switch. To this end, processing circuitry stops executing a computer program during a first context switch in response to a first context switch command. Later, the processing circuitry resumes executing the computer program during a second context switch in response to a second context switch command. The memory control circuitry, in response to the second context switch command, identifies an address of computer memory that is storing a data value previously used to execute an instruction of the computer program prior to the first context switch. The memory control circuitry then retrieves the data value from the computer memory and stores the retrieved data value in the cache memory.

Abstract: The present invention provides systems and methods for providing run-time type checking to prevent software errors. In architecture, a representative system includes a compiler that parses a program and further comprises a logic that generates a checksum for a block of code in the program, a logic that stores the checksum in the block of code, and a logic that inserts checksum instruction code into the block of code. The present invention can also be viewed as a method for providing run-time type checking to prevent software errors. A representative method operates by generating a checksum for a block of code in the program, and storing the checksum in the block of code. During execution of the program, a run-time checksum is generated for the block of code, and the block of code is executed if the checksum equals the run-time checksum, and the execution of the block of code is skipped if the checksum does not equals the run-time checksum.

Abstract: The present invention provides systems and methods for preventing software errors caused by address range or alignment errors. In architecture, a representative system includes a compiler that parses a program and further comprises a logic that generates a verification value for a block of code in the program, a logic that stores the verification value in the block of code, and a logic that inserts verification value instruction code into the block of code. The present invention can also be viewed as a method for preventing software errors in a program. A representative method operates by generating a verification value for a block of code in the program, and storing the verification value in the block of code. During execution of the program, a runtime verification value is generated for the block of code, and the block of code is executed if the verification value equals the runtime verification value, and generates an error message if the verification value does not equals the runtime verification value.

Abstract: A method for reducing cache memory misses in a computer that performs context switches between at least a first context and a second context. A First logic identifies a first prefetch region in a first memory element and a second logic identifies critical memory references within the first prefetch region during compilation of a computer program. The critical memory references within the first prefetch region correspond to data in cache memory if a context switch occurs from a process or thread associated with the second context to a process or thread associated with the first context during program execution. Third logic prefetches data associated with the identified critical memory references and stores the prefetched data in cache memory prior to a process or thread associated with the first context being resumed when a switch from the second context to the first context occurs during program execution.

Abstract: The present invention relates to a system and method for reducing the adverse impact of assertion instructions to processor performance so that programmers will be encouraged to include assertion instructions in computer programs. The system of the present invention includes memory and a compiler. The memory stores a first program to be compiled by the compiler. The compiler, in compiling the first program, translates a first function of the first program into a second function of a second program. The first function has assertion instructions that are translated by the compiler into translated assertion instructions, which are included in the second function. In compiling the first program, the compiler enables selective execution, based on a run time input, of a portion of the translated assertion instructions included in the second function.

Abstract: Compiler-based checkpointing for error recovery. In various embodiments, a compiler is adapted to identify checkpoints in program code. Sets of data objects are associated with the checkpoints, and checkpoint code is generated by the compiler for execution at the checkpoints. The checkpoint code stores state information of the associated data objects for recovery if execution of the program is interrupted.

Abstract: The present invention relates to a system and method for reducing the adverse impact of assertion instructions to processor performance so that programmers will be encouraged to include assertion instructions in computer programs. The system of the present invention includes memory and a compiler. The memory stores a first program to be compiled by the compiler. The compiler, in compiling the first program, translates a first function of the first program into a second function of a second program. The first function has assertion instructions that are translated by the compiler into translated assertion instructions, which are included in the second function. In compiling the first program, the compiler enables selective execution, based on a run time input, of a portion of the translated assertion instructions included in the second function.

Abstract: A function of a computer program is executed by a computer system capable of detecting whether an instruction of the function, if executed, will access memory that has not been allocated to the function. More specifically, a memory device is loaded with data indicative of which locations of memory are allocated to a computer program function. Processing circuitry that is processing an instruction of the function for execution is configured to detect, based on the foregoing data, whether a memory location to be accessed via execution of the instruction is one of the memory locations allocated to the function. If the memory location is outside of the memory allocated to the function, the circuitry may prevent execution of the instruction and/or may transmit an error signal. Thus, data errors caused by accessing memory that has not been allocated to the function can be prevented.

Abstract: The present invention provides systems and methods for providing run-time type checking to prevent software errors. In architecture, a representative system includes a compiler that parses a program and further comprises a logic that generates a checksum for a block of code in the program, a logic that stores the checksum in the block of code, and a logic that inserts checksum instruction code into the block of code. The present invention can also be viewed as a method for providing run-time type checking to prevent software errors. A representative method operates by generating a checksum for a block of code in the program, and storing the checksum in the block of code. During execution of the program, a run-time checksum is generated for the block of code, and the block of code is executed if the checksum equals the run-time checksum, and the execution of the block of code is skipped if the checksum does not equals the run-time checksum.

Abstract: The present invention provides systems and methods for preventing software errors caused by address range or alignment errors. In architecture, a representative system includes a compiler that parses a program and further comprises a logic that generates a verification value for a block of code in the program, a logic that stores the verification value in the block of code, and a logic that inserts verification value instruction code into the block of code. The present invention can also be viewed as a method for preventing software errors in a program. A representative method operates by generating a verification value for a block of code in the program, and storing the verification value in the block of code. During execution of the program, a runtime verification value is generated for the block of code, and the block of code is executed if the verification value equals the runtime verification value, and generates an error message if the verification value does not equals the runtime verification value.

Abstract: A method and an apparatus are provided for reducing cache memory misses in a computer that performs context switches between at least a first context and a second context. First logic identifies at least a first prefetch region in a first memory element during compilation of a computer program by the computer. Second logic identifies critical memory references within the first prefetch region during compilation. The critical memory references within the first prefetch region correspond to data that may be needed in cache memory if a context switch occurs from a process or thread associated with the second context to a process or thread associated with the first context during program execution by the computer. Third logic prefetches data associated with the identified critical memory references and stores the prefetched data in cache memory prior to a process or thread associated with the first context being resumed when a switch from the second context to the first context occurs during program execution.