Abstract: Techniques are provided for transmitting signals through a differential interface between circuits in different power supply domains. A driver circuit in a first power supply domain converts single-ended signals into differential signals. The driver circuit then transmits the differential signals to a receiver circuit in a second power supply domain. The receiver circuit converts the differential signals back into single-ended signals for transmission to circuit elements in the second power supply domain. The differential interface reduces the transmission of noise between circuit elements in the first power supply domain and circuit elements in the second power supply domain.

Abstract: A method of calculating a system power distribution network impedance is presented. The impedance calculation calculates the impedance as separate elements of the printed circuit board (PCB). An approximation of the power and ground via inductance of the printed circuit board is made based on the configuration of the printed circuit board. The decoupling capacitors of the PCB are modeled as a parallel combination of inductors, capacitors, and resistors, and the parallel combination is used to calculate the impedance. In addition to the impedance associated with the decoupling capacitors, the method calculates an inductance associated with a mounting orientation of the decoupling capacitors. The power and ground planes of the printed circuit board have an associated capacitance and inductance, which is calculated. The resultant simulated impedance profile illustrating the board configuration impedance over a frequency range is displayed.

Abstract: A method for optimizing pin selection for an integrated circuit is provided. Pin locations are mapped to a vector. The mutual inductive relationships between pins of the integrated circuit are captured into a matrix. The matrix contains the data of how a signal state of each pin is affected by the toggling of other pins within the I/O bank. The pin locations and the crosstalk matrix are combined to characterize the impact of the crosstalk on the pins for the pin placement. Thereafter, a user may decide to alter the pin placement or alter the sampling interval for the pin to avoid sampling the pin when the crosstalk may affect the signal integrity. The method may be applied for multiple simultaneous switching noise cause mechanisms impacting the signal integrity. In this embodiment, a worst case cause mechanism from the individually quantified cause mechanisms is determined by comparing an impact of each of the cause mechanisms.

Abstract: Computer-aided design tools analyze a custom logic design for a programmable logic device integrated circuit. The tools identify distinct clock domains in the design. The tools also identify which of the clock domains are synchronous. The tools examine the synchronous clock domains to determine which of the clock domains have required fixed phase relationships. Clocks for clock domains that do not have required fixed relationships can be adjusted in phase to minimize power supply simultaneous switching noise. Noise may be minimized by making clock phase adjustments using a programmable phase-locked loop circuit.

Abstract: An inductive compensation apparatus for smooth compensation of a transmission bus and methods of operating the same result in improved impedance of the transmission bus for transfer of data signals. The inductive compensation apparatus having an input and an output and a transmission bus with an effective impedance comprises a first capacitance connected to the input and a second capacitance connected to the output. A first bus compensator is connected between the input and the first capacitance to compensate the first capacitance and raise the impedance of the transmission bus. A second bus compensator is connected between the first capacitance and the second capacitance to compensate the first capacitance and the second capacitance and raise the impedance of the transmission bus. A third bus compensator is connected between the second capacitance and the output to compensate the second capacitance and raise the impedance of the transmission bus for improved data transfers on the transmission bus.