Abstract: A configurable driver integrated circuit is disclosed having a plurality of input/output terminals for interfacing exterior of the integrated circuit. The integrated circuit includes a plurality of driver circuits, with each driver circuit including a transistor having a source and a drain, and each of the source and drain thereof connected to a dedicated and respective one of the input/output terminals and further includes a gate driver for driving a gate of the transistor, with supply inputs associated with a floating voltage domain, and each driver circuit also includes a level shift circuit for shifting the level of a logic signal from a fixed voltage domain to the floating voltage domain. A switching circuitry generates switching signals in a fixed voltage domain for controlling the operation of each of the driver circuits in accordance with a predetermined configuration defined by external circuit.

Abstract: A wireless battery charging system includes an inductive receiving member for receiving an AC signal for output to a matching circuit having a variable impedance with variable matching parameters. The output of the matching circuit drives a rectifier circuit for converting the inputted AC signal to a first DC voltage and having variable rectifier parameters to vary the voltage drop thereacross. A DC-to-DC converter for converting the first DC voltage to a regulated voltage for charging the battery. A current sensor senses current through the inductive receiving member, rectifier circuit and DC-to-DC converter. A controller senses the voltage drop across each of the matching circuit, rectifier circuit and DC-to-DC converter and the current there through to determine power dissipation in each of the matching circuit, rectifier circuit and DC-to-DC converter. The power distribution in each of the matching circuit, the rectifier circuit and the DC-to-DC converter can then be varied.

Abstract: A configurable driver integrated circuit is disclosed having a plurality of input/output terminals for interfacing exterior of the integrated circuit. The integrated circuit includes a plurality of driver circuits, with each driver circuit including a transistor having a source and a drain, and each of the source and drain thereof connected to a dedicated and respective one of the input/output terminals and further includes a gate driver for driving a gate of the transistor, with supply inputs associated with a floating voltage domain, and each driver circuit also includes a level shift circuit for shifting the level of a logic signal from a fixed voltage domain to the floating voltage domain. A switching circuitry generates switching signals in a fixed voltage domain for controlling the operation of each of the driver circuits in accordance with a predetermined configuration defined by external circuit.

Abstract: A configurable driver integrated circuit is disclosed having a plurality of input/output terminals for interfacing exterior of the integrated circuit. The integrated circuit includes a plurality of driver circuits, with each driver circuit including a transistor having a source and a drain, and each of the source and drain thereof connected to a dedicated and respective one of the input/output terminals and further includes a gate driver for driving a gate of the transistor, with supply inputs associated with a floating voltage domain, and each driver circuit also includes a level shift circuit for shifting the level of a logic signal from a fixed voltage domain to the floating voltage domain. A switching circuitry generates switching signals in a fixed voltage domain for controlling the operation of each of the driver circuits in accordance with a predetermined configuration defined by external circuit.

Abstract: A wireless battery charging system includes an inductive receiving member for receiving an AC signal for output to a matching circuit having a variable impedance with variable matching parameters. The output of the matching circuit drives a rectifier circuit for converting the inputted AC signal to a first DC voltage and having variable rectifier parameters to vary the voltage drop thereacross. A DC-to-DC converter for converting the first DC voltage to a regulated voltage for charging the battery. A current sensor senses current through the inductive receiving member, rectifier circuit and DC-to-DC converter. A controller senses the voltage drop across each of the matching circuit, rectifier circuit and DC-to-DC converter and the current there through to determine power dissipation in each of the matching circuit, rectifier circuit and DC-to-DC converter. The power distribution in each of the matching circuit, the rectifier circuit and the DC-to-DC converter can then be varied.

Abstract: A transceiver includes a processor, which is adapted to in a transmit mode of the transceiver, form at least part of a transmitter and in a receive mode of the transceiver, form at least part of a receiver. The transceiver may include at least one analog-to-digital converter to provide digital signals to the processor in both the transmit and receive modes of operation; and the transceiver may include at least one digital-to-analog converter to receive digital signals from the processor in the transmit and receive modes of operation. The processor may be fabricated on an integrated circuit with at least one of the analog-to-digital converters and/or with at least one of the digital-to-analog converters.

Abstract: In one embodiment, the present invention includes a method for determining if a frequency control instruction would cause a first capacitor bank to reach a limit and adjusting the first capacitor bank in a first direction using a calibration value and adjusting a second capacitor bank in a second direction if the first capacitor bank would reach the limit. Furthermore, the calibration value may be calculated and stored in accordance with other embodiments. In such manner, small changes in capacitance and correspondingly small changes in frequency may be effected.

Abstract: A transceiver includes a processor and an analog-to-digital converter. The processor is adapted to in a transmit mode of the transceiver, generate a modulated signal in response to a first digital signal. In a receive mode of the transceiver, the processor is adapted to generate a demodulated signal in response to a second digital signal. The analog-to-digital converter provides the first digital signal in the transmit mode and provides the second digital signal in the receive mode.

Abstract: Methods and systems for determining transmission channels for short range transmissions are disclosed. A transmitter provides short range transmission to a broadcast receiver configured to receive and tune channels within a signal spectrum. Channels within the broadcast signal spectrum are scanned, and an indication of received signal strength is obtained for each channel. The received signal strength indication (RSSI) can then be compared to a threshold power level that correlates to a signal level that the transmitter will be capable of overpowering based upon the transmission power of the transmitter. The scan results in an indication of one or more channels that have received signal strengths below the threshold power level of the transmitter.

Abstract: In one embodiment, the present invention includes a method for determining if a frequency control instruction would cause a first capacitor bank to reach a limit and adjusting the first capacitor bank in a first direction using a calibration value and adjusting a second capacitor bank in a second direction if the first capacitor bank would reach the limit. Furthermore, the calibration value may be calculated and stored in accordance with other embodiments. In such manner, small changes in capacitance and correspondingly small changes in frequency may be effected.

Abstract: In one embodiment, the present invention includes a method for determining if a frequency control instruction would cause a first capacitor bank to reach a limit and adjusting the first capacitor bank in a first direction using a calibration value and adjusting a second capacitor bank in a second direction if the first capacitor bank would reach the limit. Furthermore, the calibration value may be calculated and stored in accordance with other embodiments. In such manner, small changes in capacitance and correspondingly small changes in frequency may be effected.

Abstract: A system and method are disclosed for using dynamic supply voltages to bias circuit blocks within integrated circuits. By considering current requirements for circuit blocks based upon process variations and environmental conditions, a dynamic supply voltage can be used such that operational integrity can be maintained while reducing power consumption. By using a dynamic supply voltage, circuit blocks can be operated at a desired speed while still reducing the power required for this operation. To implement this dynamic supply regulation, circuit elements are provided within a variable supply voltage circuit that cause the dynamic supply voltage to vary based upon operational parameters such as process variations and environment parameters. As such, circuit blocks can be provided a supply voltage high enough to allow operational integrity at required speeds but not so high as to waste power by unnecessarily increasing current consumption.

Abstract: Methods and systems for determining transmission channels for short range transmissions are disclosed. A transmitter provides short range transmission to a broadcast receiver configured to receive and tune channels within a signal spectrum. Channels within the broadcast signal spectrum are scanned, and an indication of received signal strength is obtained for each channel. The received signal strength indication (RSSI) can then be compared to a threshold power level that correlates to a signal level that the transmitter will be capable of overpowering based upon the transmission power of the transmitter. The scan results in an indication of one or more channels that have received signal strengths below the threshold power level of the transmitter.

Abstract: A transceiver includes a processor, which is adapted to in a transmit mode of the transceiver, form at least part of a transmitter and in a receive mode of the transceiver, form at least part of a receiver. The transceiver may include at least one analog-to-digital converter to provide digital signals to the processor in both the transmit and receive modes of operation; and the transceiver may include at least one digital-to-analog converter to receive digital signals from the processor in the transmit and receive modes of operation. The processor may be fabricated on an integrated circuit with at least one of the analog-to-digital converters and/or with at least one of the digital-to-analog converters.

Abstract: A technique includes digitally generating orthogonal modulated signals, each of which has spectral energy that is generally centered at an intermediate frequency. The orthogonal modulated signals are frequency translated to produce translated signals, each of which has spectral energy that is generally centered about a second frequency that is higher than the intermediate frequency. The translated signals are combined to generate a modulated signal.

Abstract: A transceiver includes a processor and an analog-to-digital converter. The processor is adapted to in a transmit mode of the transceiver, generate a modulated signal in response to a first digital signal. In a receive mode of the transceiver, the processor is adapted to generate a demodulated signal in response to a second digital signal. The analog-to-digital converter provides the first digital signal in the transmit mode and provides the second digital signal in the receive mode.

Abstract: In one embodiment, the present invention includes a method for determining if a frequency control instruction would cause a first capacitor bank to reach a limit and adjusting the first capacitor bank in a first direction using a calibration value and adjusting a second capacitor bank in a second direction if the first capacitor bank would reach the limit. Furthermore, the calibration value may be calculated and stored in accordance with other embodiments. In such manner, small changes in capacitance and correspondingly small changes in frequency may be effected.

Abstract: In one embodiment, the present invention includes an apparatus having a first capacitor coupled between a first node and a second node, a second capacitor coupled between the second node and a reference potential, and a third capacitor coupled between the second node and a switch, where the switch is controllable to couple the third capacitor to the second node. Using such an apparatus small changes in capacitance and correspondingly small changes in frequency may be effected. Other embodiments are directed to calibration of one or more capacitor banks.

Abstract: A low drop-out regulator circuit that has high ripple rejection and low power consumption. A first local feedback loop is a high-speed, high-bandwidth loop that actively rejects noise from the input source to the regulator. A second feedback loop, having lower speed and a correspondingly lower bandwidth than the first feedback loop, regulates the output voltage. Each feedback loop is separately optimized for its respective bandwidth requirements and, therefore, the regulator is highly efficient. The first feedback loop comprises an amplifier and a pair of PMOS transistors configured as a current mirror with current gain. The first feedback loop generates a first current for charging an output capacitor. Feedback ensures that the first current is proportional to a second current generated by the second feedback loop while rejecting noise from the input source.