Abstract: A portable information handling system may be equipped with a folded continuous multielement touch display that covers a front and back surface of a display member. Based on a physical state and a usage case of the portable information handling system, certain elements in the multielement touch display may be selectively deactivated or disabled.

Abstract: Embodiments of systems and methods for power control in an Organic Light Emitting Diode (OLED) display device are described. In an embodiment, a method includes monitoring a level of current draw from an Organic Light Emitting Diode (OLED) display device. The method may also include comparing the level of current draw to a threshold value. Additionally, a method may include throttling system power consumption in response to the level of current draw exceeding the threshold value.

Abstract: Embodiments of systems and methods for power control in an Organic Light Emitting Diode (OLED) display device are described. In an embodiment, a method includes monitoring a level of current draw from an Organic Light Emitting Diode (OLED) display device. The method may also include comparing the level of current draw to a threshold value. Additionally, a method may include throttling system power consumption in response to the level of current draw exceeding the threshold value.

Abstract: Embodiments of systems and methods for power control in an Organic Light Emitting Diode (OLED) display device are described. In an embodiment, a method includes monitoring a level of current draw from an Organic Light Emitting Diode (OLED) display device. The method may also include comparing the level of current draw to a threshold value. Additionally, a method may include throttling system power consumption in response to the level of current draw exceeding the threshold value.

Abstract: A solid-state drive (SSD) may not include a dynamic random access memory (DRAM) but rather may utilize a host memory buffer of system random access memory (RAM). During a power failure data on dirty cache lines may be lost. A power protection caching policy may be implemented where an SSD controller is capable of accepting a flush cache signal, which may be a signal to a redefined pin of the SSD or a command, from a controller of the information handling system. The controller may utilize a slope detect mechanism and/or a power good detect mechanism to detect a power failure and if a power failure is detected to issue a flush cache signal the SSD controller to cause a flush of all dirty cache lines from the host memory buffer before the power failure results in inoperability of circuitry associated with the dirty cache lines.

Abstract: A portable information handling system may be equipped with a folded continuous multielement touch display that covers a front and back surface of a display member. Based on a physical state and a usage case of the portable information handling system, certain elements in the multielement touch display may be selectively deactivated or disabled.

Abstract: Systems and methods are disclosed for multi-coil wireless power transfer. The system includes a first transmitting coil disposed within a lower portion of a wireless charger, and a second transmitting coil disposed within a side portion of the wireless charger. The system further includes a communications module configured to receive a signal from an information handling system. The information handling system includes a receiving coil. The system additionally includes a transmit module configured to determine an orientation of the receiving coil, and provide a first current to the first transmitting coil and a second current to the second transmitting coil based on the orientation of the receiving coil.

Abstract: A solid-state drive (SSD) may not include a dynamic random access memory (DRAM) but rather may utilize a host memory buffer of system random access memory (RAM). During a power failure data on dirty cache lines may be lost. A power protection caching policy may be implemented where an SSD controller is capable of accepting a flush cache signal, which may be a signal to a redefined pin of the SSD or a command, from a controller of the information handling system. The controller may utilize a slope detect mechanism and/or a power good detect mechanism to detect a power failure and if a power failure is detected to issue a flush cache signal the SSD controller to cause a flush of all dirty cache lines from the host memory buffer before the power failure results in inoperability of circuitry associated with the dirty cache lines.

Abstract: Embodiments of systems and methods for power control in an Organic Light Emitting Diode (OLED) display device are described. In an embodiment, a method includes monitoring a level of current draw from an Organic Light Emitting Diode (OLED) display device. The method may also include comparing the level of current draw to a threshold value. Additionally, a method may include throttling system power consumption in response to the level of current draw exceeding the threshold value.

Abstract: Systems and methods are disclosed for multi-coil wireless power transfer. The system includes a first transmitting coil disposed within a lower portion of a wireless charger, and a second transmitting coil disposed within a side portion of the wireless charger. The system further includes a communications module configured to receive a signal from an information handling system. The information handling system includes a receiving coil. The system additionally includes a transmit module configured to determine an orientation of the receiving coil, and provide a first current to the first transmitting coil and a second current to the second transmitting coil based on the orientation of the receiving coil.

Abstract: A graphics processing system and method for displaying an image having first and second graphics processors coupled together. A main display device is coupled to the first graphics processor. Secondary display devices are coupled to the second graphics processor. The first and second graphics processors are operable to share processing for displaying the image on the main display, or the first graphics processor is operable to process a main portion of the image for displaying the main portion of the image on the main display and the second graphics processor is operable to process secondary portions of the image for displaying the secondary portions of the image on the secondary display devices.

Abstract: A variable speed data processor includes a clock generator generating a plurality of clocks at different clock rates. Clock select circuitry synchronously selects one of the clocks as an output clock signal to data processing circuitry, based on a data activity indication. Activity logic generates the data activity indication based at least in part on the existence of data processing activity targeted to the data processing circuitry. When the data processing circuitry experiences bursty data processing activity, the clock rate can shift rapidly between the multiple clock rates, conserving power without substantially diminishing the availability of the data processing circuitry.

Abstract: A portable information handling system (IHS) performance increasing apparatus includes a portable slice chassis that is operable to be coupled to an IHS external to a portable IHS chassis. At least one graphics processing unit is located in the portable slice chassis. The apparatus may be coupled to a portable IHS to provide increased graphics processing power for the portable IHS.