Patents by Inventor Lawrence G. Meares

Lawrence G. Meares has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7110929
    Abstract: A simulation template and method therefor is disclosed that modifies a SPICE netlist that describes a circuit in order to provide customized or pre-installed additional analysis. More specifically, a simulation template is an interactive command language (ICL) script that has embedded instructions telling a netlist where to insert information and which options are to be provided. It is used to expand SPICE beyond the traditional limitations of the basic alternating current (AC), direct current (DC), and transient analysis by allowing parameter variations and multiple simulations passes to be run under one analysis umbrella. Such additional analysis employing parameter variations and multiple analysis passes include sensitivity analysis, root means square (RSS) analysis, extreme value analysis (EVA) and worst case sensitivity (WCS), to name a few.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: September 19, 2006
    Assignee: Intusoft
    Inventor: Lawrence G. Meares
  • Publication number: 20030188275
    Abstract: A system, method, and software module for preventing a simulation and/or analysis of a circuit described in a netlist if a change in the circuit topology has been detected. The method entails scanning the netlist for circuit topology changes prior to performing the simulation or analysis on the circuit. If no change in the circuit topology has been detected, then the simulation or analysis of the circuit is allowed to proceed. If, on the other hand, a change in the circuit topology has been detected, then in some cases the simulation and/or analysis of the circuit is prevented. The methodology allows a prospective customer to perform simulation and/or analysis on a complicated circuit with a freely-distributed demo simulation program, and yet it does not rise to the software manufacturing giving away its software since the simulation and/or analysis is restricted to that particular circuit topology.
    Type: Application
    Filed: March 27, 2002
    Publication date: October 2, 2003
    Inventor: Lawrence G. Meares
  • Patent number: 6230305
    Abstract: A computerized drawing system enables a set of schematic diagrams to be created and modified. Display information associated with a circuit is entered into a computer. The display information may include symbols, interconnections, and other information. A plurality of schematic layers are created from the display information and stored. A plurality of schematic configurations are then defined by a layer or by combining two or more layers together. Any given layer may be included in more than one configuration. The configurations are then stored for utilization during the design process. A user may modify one of the created layers. The system then automatically modifies each of the configurations which contain the modified layer. While a configuration is being displayed, a user may highlight information of the layers which is included in the displayed configuration.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: May 8, 2001
    Assignee: Intusoft
    Inventor: Lawrence G. Meares
  • Patent number: 4395751
    Abstract: Replacing the timing core of a conventional two-core inverter with a magnetic amplifier allows for control of frequency and for B-H loop symmetry. Switching of the magnetic amplifier results in inverter commutation rather than the familiar pulse width modulation.
    Type: Grant
    Filed: September 21, 1981
    Date of Patent: July 26, 1983
    Assignee: McDonnell Douglas Corporation
    Inventor: Lawrence G. Meares
  • Patent number: 4254406
    Abstract: An integrating analog-to-digital converter particularly adapted to measure inertial instrument outputs for strap-down navigation. In the converter, an input signal is summed with a number of precisely quantized voltage pulses and is integrated. An error signal at the output of the integrator controls the rebalance duty cycle of the converter. Counting the net rebalance quanta over an interval results in an output count which is proportional to the input signal voltage.
    Type: Grant
    Filed: July 29, 1977
    Date of Patent: March 3, 1981
    Assignee: McDonnell Douglas Corporation
    Inventor: Lawrence G. Meares
  • Patent number: 4174465
    Abstract: Apparatus for transmitting particular output signals from a plurality of analog-to-digital converters to the guidance computer of an inertial navigation system. The number of channels of signals to be transmitted exceeds the number of available data lines. The A/D converter output is converted, according to its particular logic code, to a series of pulse counts which are thereafter multiplexed in a pulse combiner and applied to the data lines. During a first selected time interval, the pulses are accumulated for interleaving and transmission with the real time pulses in a second selected time interval. The multiplexing combines such interleaved pulses from one A/D converter output with those from another such output in alternate time intervals. Sync words are transmitted along with the data to permit the guidance computer software to demultiplex the data.
    Type: Grant
    Filed: July 29, 1977
    Date of Patent: November 13, 1979
    Assignee: McDonnell Douglas Corporation
    Inventors: Lawrence G. Meares, Robert D. Simpson