Abstract: The specification describes a leadframe that is aimed at high-performance digital IC devices with high-pin counts, and packaged using wire bond technology. According to the invention the configuration of the paddle is modified to add a new dimension to the leadframe design. In a preferred embodiment, one or more slots are formed in the paddle to allow the length of selected wire bonds to be reduced. This reduces the susceptibility of these selected leads to parasitic capacitances. The selected leads are typically those that carry very high-speed signals.

Abstract: A packaged integrated circuit for installation on a printed wiring board (PWB) or other type of circuit mounting structure, that allows for the routing of high-speed signals out from high-speed leads on an underside of the packaged integrated circuit. The packaged integrated circuit comprises a die and a package body formed from encapsulant that at least partially encloses the die. A leadframe is also connected to the die and partially enclosed in the package body. Leads extend out from the package body and a subset of these leads are separated by a lead-to-lead pitch. At least two adjacent leads of the leadframe are separated by a space larger than the pitch. An additional lead is also connected to the die and disposed on an underside of the package. The additional lead is connectable to a circuit mounting structure trace passing between the adjacent leads separated by the space larger than the pitch.