Abstract: A digital device interface for transferring information between a processor and a control device includes a first serial peripheral interface (SPI), e.g., with “data in,” “data out” and “clock” ports, in serial communication with a second SPI. The first SPI can be coupled to, and associated with, the processor; the second SPI, with the control device. A first transfer logic section, e.g., a shift register engine, transfers bytes, word, longwords or other multi-bit datum between the processor and the control device. A second transfer logic section effects a transfer transaction between the processor and the control device—that is, the transfer of plural multi-bit datum relating to a common data access operation or a common data generation operation. For sensor-type control devices, such a transaction may include, for example, the “continuous” transfer of data sensed by the device.