Patents by Inventor Lawrence Kulinsky

Lawrence Kulinsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110203936
    Abstract: A method of forming three-dimensional structures includes forming a conductive layer on a substrate and patterning a resist layer over the conductive layer, the resist layer having contained therein a plurality of vias. An electrically conductive polymer is then electro-deposited in the vias. The electro-deposition operation is then stopped to form one or more of posts, posts having bulbous termini (i.e., mushrooms), or a layer atop the resist layer. The resist may be removed to yield the structure which may be further processed. For example, the structure may be pyrolyzed. In addition, biomolecules may also be adhered or otherwise affixed to the structure.
    Type: Application
    Filed: February 17, 2011
    Publication date: August 25, 2011
    Inventors: Lawrence Kulinsky, Marc J. Madou
  • Patent number: 7525178
    Abstract: A termination region of a semiconductor die is provided, which includes one or more field rings arranged in the termination region, one or more metal field plates, and an insulation layer disposed to prevent direct electrical contact between the field rings and the field plate such that the at least one field ring is capacitively coupled with the at least one field plate. Such a termination region may also include a polysilicon plate capacitively coupled with a diffusion region laterally spaced from the field rings, the polysilicon plate being located at an outer surface or directly under a passivation layer at an outer surface of the die. The termination region may also include floating field rings. The insulation layer may be a field oxide layer.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: April 28, 2009
    Assignee: International Rectifier Corporation
    Inventor: Lawrence Kulinsky
  • Publication number: 20070090492
    Abstract: A termination region of a semiconductor die is provided, which includes one or more field rings arranged in the termination region, one or more metal field plates, and an insulation layer disposed to prevent direct electrical contact between the field rings and the field plate such that the at least one field ring is capacitively coupled with the at least one field plate. Such a termination region may also include a polysilicon plate capacitively coupled with a diffusion region laterally spaced from the field rings, the polysilicon plate being located at an outer surface or directly under a passivation layer at an outer surface of the die. The termination region may also include floating field rings. The insulation layer may be a field oxide layer.
    Type: Application
    Filed: October 25, 2006
    Publication date: April 26, 2007
    Inventor: Lawrence Kulinsky
  • Patent number: 6768211
    Abstract: A novel five-layer tape is provided for applications such as bonding, interconnection and insulation of different parts of a semiconductor package at the same time. The five layer tape includes a metal conductive layer that is sandwiched between two insulative layers, that are themselves in turn sandwiched by two adhesive layers. Windows cut into the insulative and adhesive layers on either the top or bottom of the tape permit electrical connection to the metallic conductive layer. The tape may be made from two insulation sheets that have an adhesive layer and a metallic interconnect. In turn, the tape enables the manufacturer to overcome physical limitations in forming conduction paths, including permitting the connection of multiple die where the terminals of the one die are obscured by the other die.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: July 27, 2004
    Assignee: International Rectifier Corporation
    Inventor: Lawrence Kulinsky
  • Publication number: 20040026795
    Abstract: A novel five-layer tape is provided for applications such as bonding, interconnection and insulation of different parts of a semiconductor package at the same time. The five layer tape includes a metal conductive layer that is sandwiched between two insulative layers, that are themselves in turn sandwiched by two adhesive layers. Windows cut into the insulative and adhesive layers on either the top or bottom of the tape permit electrical connection to the metallic conductive layer. The tape may be made from two insulation sheets that have an adhesive layer and a metallic interconnect. In turn, the tape enables the manufacturer to overcome physical limitations in forming conduction paths, including permitting the connection of multiple die where the terminals of the one die are obscured by the other die.
    Type: Application
    Filed: August 4, 2003
    Publication date: February 12, 2004
    Applicant: International Rectifier Corporation
    Inventor: Lawrence Kulinsky
  • Patent number: 6621166
    Abstract: A novel five-layer tape is provided for applications such as bonding, interconnection and insulation of different parts of a semiconductor package at the same time. The five layer tape includes a metal conductive layer that is sandwiched between two insulative layers, that are themselves in turn sandwiched by two adhesive layers. Windows cut into the insulative and adhesive layers on either the top or bottom of the tape permit electrical connection to the metallic conductive layer. The tape may be made from two insulation sheets that have an adhesive layer and a metallic interconnect. In turn, the tape enables the manufacturer to overcome physical limitations in forming conduction paths, including permitting the connection of multiple die where the terminals of the one die are obscured by the other die.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: September 16, 2003
    Assignee: International Rectifier Corporation
    Inventor: Lawrence Kulinsky
  • Publication number: 20010042592
    Abstract: A novel five-layer tape is provided for applications such as bonding, interconnection and insulation of different parts of a semiconductor package at the same time. The five layer tape includes a metal conductive layer that is sandwiched between two insulative layers, that are themselves in turn sandwiched by two adhesive layers. Windows cut into the insulative and adhesive layers on either the top or bottom of the tape permit electrical connection to the metallic conductive layer. The tape may be made from two insulation sheets that have an adhesive layer and a metallic interconnect. In turn, the tape enables the manufacturer to overcome physical limitations in forming conduction paths, including permitting the connection of multiple die where the terminals of the one die are obscured by the other die.
    Type: Application
    Filed: May 18, 2001
    Publication date: November 22, 2001
    Applicant: International Rectifier Corporation
    Inventor: Lawrence Kulinsky