Patents by Inventor Lawrence LaTerza

Lawrence LaTerza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11657415
    Abstract: A system and method for online user feedback management are provided. The method includes receiving online user feedbacks for a product from a plurality of users. A plurality of topics for the product are identified from the online user feedbacks. For each topic, the received online user feedbacks are categorized into a plurality of groups based on a rating score provided in each online user feedback for the product and semantic analysis of each online user feedback for the product. A net promoter score (NPS) uplift for each topic is calculated, where the NPS uplift measures an improvement in a NPS for the product if issues related to the topic are resolved. A priority topic is identified based on the NPS uplift for each of the topics. The priority topic is then prioritized in resolving issues related to the topics included in the online user feedbacks.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: May 23, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Manoj Kumar Rawat, Gregory Lawrence Brake, Christopher Lawrence Laterza, Erfan Najmi, Andres Felipe Salcedo, Jin Luo
  • Publication number: 20230137378
    Abstract: A method and system for generating synthetic privacy preserving training data for training a language classifier machine-learning (ML) model includes receiving a request to generate the synthetic privacy-preserving training data for the language classifier ML model, retrieving labeled training data associated with training the language classifier ML model, providing the labeled training data, one or more privacy parameters, and a domain type associated with the labeled training data to a synthetic data generation ML model, the synthetic data generation ML model being configured to generate synthetic training data in a privacy-persevering manner, receiving synthetic privacy-preserving training data as an output from the synthetic data generation ML model, and providing the synthetic privacy preserving training data to the language classifier ML model for training the language classifier ML model in classifying text.
    Type: Application
    Filed: November 2, 2021
    Publication date: May 4, 2023
    Inventors: Christopher Lawrence LaTERZA, Girish KUMAR, David Benjamin LEVITAN
  • Publication number: 20230111999
    Abstract: A method and system for generating clusters for feedback data may include receiving a request for clustering feedback data, the request including one or more parameters relating to the feedback data, retrieving a plurality of vectorized feedbacks stored in a key value format, the key value format including a feedback identifier used as a key for each of the plurality of vectorized feedbacks, creating a plurality of feedback clusters based on the one or more parameters and the retrieved plurality of vectorized feedbacks, the plurality of feedback clusters categorizing at least some of the feedback data into the plurality of feedback clusters, and transmitting data relating to the plurality of feedback clusters for display on a user interface screen.
    Type: Application
    Filed: October 8, 2021
    Publication date: April 13, 2023
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Sathia Prabhu THIRUMAL, Christopher Lawrence LATERZA, Rashmi Mala BRAHMA, Pranav Jayant FARSWANI
  • Publication number: 20220366139
    Abstract: A system and method for creating a machine learning (ML) classifier for a database uses a weakly-supervised training data set created automatically from database items on the basis of a human-created keyword set. The automatically created training data set is used to construct one or more deep learning classifier checkpoints, which can then be compared with one another and with a classifier based on the original keyword set in order to select a classifier for use by other users viewing the database.
    Type: Application
    Filed: June 23, 2021
    Publication date: November 17, 2022
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Sathia Prabhu THIRUMAL, Christopher Lawrence LATERZA, Manoj KUMAR RAWAT, Karan Singh REKHI, Natarajan ARUMUGAM, Pranav Jayant FARSWANI
  • Publication number: 20220366138
    Abstract: A system and method for creating a machine learning (ML) classifier for a database uses a weakly-supervised training data set created automatically from database items on the basis of a human-created keyword set. The automatically created training data set is used to construct one or more deep learning classifier checkpoints, which can then be compared with one another and with a classifier based on the original keyword set in order to select a classifier for use by other users viewing the database.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 17, 2022
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Sathia Prabhu THIRUMAL, Christopher Lawrence LATERZA, Manoj KUMAR RAWAT, Karan Singh REKHI, Natarajan ARUMUGAM, Pranav Jayant FARSWANI
  • Publication number: 20220358529
    Abstract: A system and method for online user feedback management are provided. The method includes receiving online user feedbacks for a product from a plurality of users. A plurality of topics for the product are identified from the online user feedbacks. For each topic, the received online user feedbacks are categorized into a plurality of groups based on a rating score provided in each online user feedback for the product and semantic analysis of each online user feedback for the product. A net promoter score (NPS) uplift for each topic is calculated, where the NPS uplift measures an improvement in a NPS for the product if issues related to the topic are resolved. A priority topic is identified based on the NPS uplift for each of the topics. The priority topic is then prioritized in resolving issues related to the topics included in the online user feedbacks.
    Type: Application
    Filed: May 10, 2021
    Publication date: November 10, 2022
    Applicant: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Manoj Kumar RAWAT, Gregory Lawrence BRAKE, Christopher Lawrence LATERZA, Erfan NAJMI, Andres Felipe SALCEDO, Jin LUO
  • Publication number: 20040075160
    Abstract: A semiconductor device includes a heavily doped first layer of a first conductivity type having a bulk portion and a mesa portion disposed above the bulk portion. A second layer of a second conductivity type is deposited on the mesa portion of the first layer to form a p-n junction therewith. The second layer is more lightly doped than the first layer. A contact layer of the second conductivity type is formed on the second layer. First and second electrodes electrically contact the bulk portion of the first layer and the contact layer, respectively.
    Type: Application
    Filed: October 18, 2002
    Publication date: April 22, 2004
    Inventors: Jack Eng, John Naughton, Lawrence Laterza, James Hayes, Jean-Michel Guillot
  • Patent number: 6602769
    Abstract: A bi-directional transient voltage suppression device with symmetric current-voltage characteristics has a lower semiconductor layer of first conductivity type, an upper semiconductor layer of first conductivity type, and a middle semiconductor layer adjacent to and disposed between the lower and upper layers having a second opposite conductivity type, such that upper and lower p−n junctions are formed. The middle layer has a net doping concentration that is highest at a midpoint between the junctions. Furthermore, the doping profile along a line normal to the lower, middle and upper layers is such that, within the middle layer the doping profile on one side of a centerplane of the middle layer mirrors the doping profile on an opposite side. In addition, an integral of the net doping concentration of the middle layer taken over the distance between the junctions is such that breakdown, when it occurs, is punch through breakdown, rather than avalanche breakdown.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: August 5, 2003
    Assignee: General Semiconductor, Inc.
    Inventors: Willem G. Einthoven, Lawrence LaTerza, Gary Horsman, Jack Eng, Danny Garbis
  • Publication number: 20030038340
    Abstract: A bi-directional transient voltage suppression device with symmetric current-voltage characteristics is provided. The device comprises: (a) a lower semiconductor layer of first conductivity type; (b) an upper semiconductor layer of first conductivity type; and (b) a middle semiconductor layer adjacent to and disposed between the lower and upper layers, the middle layer having a second conductivity type opposite the first conductivity type, such that upper and lower p−n junctions are formed. In this device, the middle layer has a net doping concentration that is highest at a midpoint between the junctions. Furthermore, the doping profile along a line normal to the lower, middle and upper layers is such that, within the middle layer and within at least a portion of the lower and upper layers, the doping profile on one side of a centerplane of the middle layer mirrors the doping profile on an opposite side of the centerplane.
    Type: Application
    Filed: October 4, 2002
    Publication date: February 27, 2003
    Inventors: Willem G. Einthoven, Lawrence LaTerza, Gary Horsman, Jack Eng, Danny Garbis
  • Patent number: 6489660
    Abstract: A bi-directional transient voltage suppression device with symmetric current-voltage characteristics has a lower semiconductor layer of first conductivity type, an upper semiconductor layer of first conductivity type, and a middle semiconductor layer adjacent to and disposed between the lower and upper layers having a second opposite conductivity type, such that upper and lower p-n junctions are formed. The middle layer has a net doping concentration that is highest at a midpoint between the junctions. Furthermore, the doping profile along a line normal to the lower, middle and upper layers is such that, within the middle layer the doping profile on one side of a centerplane of the middle layer mirrors the doping profile on an opposite side. In addition, an integral of the net doping concentration of the middle layer taken over the distance between the junctions is such that breakdown, when it occurs, is punch through breakdown, rather than avalanche breakdown.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: December 3, 2002
    Assignee: General Semiconductor, Inc.
    Inventors: Willem G. Einthoven, Lawrence LaTerza, Gary Horsman, Jack Eng, Danny Garbis
  • Publication number: 20020175391
    Abstract: A bi-directional transient voltage suppression device with symmetric current-voltage characteristics is provided. The device comprises: (a) a lower semiconductor layer of first conductivity type; (b) an upper semiconductor layer of first conductivity type; and (b) a middle semiconductor layer adjacent to and disposed between the lower and upper layers, the middle layer having a second conductivity type opposite the first conductivity type, such that upper and lower p-n junctions are formed. In this device, the middle layer has a net doping concentration that is highest at a midpoint between the junctions. Furthermore, the doping profile along a line normal to the lower, middle and upper layers is such that, within the middle layer and within at least a portion of the lower and upper layers, the doping profile on one side of a centerplane of the middle layer mirrors the doping profile on an opposite side of the centerplane.
    Type: Application
    Filed: May 22, 2001
    Publication date: November 28, 2002
    Inventors: Willem G. Einthoven, Lawrence LaTerza, Gary Horsman, Jack Eng, Danny Garbis
  • Patent number: 5882986
    Abstract: Starting with a semiconductor wafer of known type including an internal, planar p-n junction parallel to major surfaces of the wafer, one of the wafer surfaces is covered with a masking layer of silicon nitride. A plurality of intersecting grooves are then sawed through the masking layer for forming a plurality of mesas having sloped walls with each mesa including a portion of the planar p-n junction having edges which intersect and are exposed by the mesa walls. The groove walls and exposed junction edges are glass encapsulated in a process including heating the wafer. The masking layers are then removed in a selective etching process not requiring a patterned etchant mask, and the now exposed silicon surfaces at the top of the mesas, as well as the opposite surface of the wafer, are metal plated. The wafer is then diced along planes through the grooves for providing individual chips each having a glass passivated mesa thereon.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: March 16, 1999
    Assignee: General Semiconductor, Inc.
    Inventors: Jack Eng, Joseph Y. Chan, Willem G. Einthoven, John E. Amato, Sandy Tan, Lawrence LaTerza, Gregory Zakaluk, Dennis Garbis
  • Patent number: 5640043
    Abstract: A high voltage silicon rectifier includes a substrate portion and an epitaxial mesa portion that is a frustrum of a pyramid with a substantially square cross section and side walls that make a forty five degree angle with the substrate portion. The mesa portion includes three germanium doped layers that introduce strain to speed up recombination of charge carriers.
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: June 17, 1997
    Assignee: General Instrument Corporation of Delaware
    Inventors: Jack Eng, Joseph Chan, Lawrence Laterza, Gregory Zakaluk, Jun Wu, John Amato, Dennis Garbis, Willem Einthoven
  • Patent number: 5432121
    Abstract: An all epitaxial process performed entirely in a CVD reactor is employed to grow epitaxial layers with accurately controlled successively low and high dopant concentrations over a heavily doped substrate, eliminating the need for a separate diffusion, even for high purity concentrations. After purging the reactor system, the heavily doped silicon substrate is "capped" by growing two successive very thin silicon sublayers of the same conductivity type. The reactor chamber is subjected to a hydrogen purge to deplete any contaminents after each sublayer is formed. The cap sublayers form a narrow, abrupt intrinsic transition region with the substrate and become an active part of the device structure. A lightly doped epitaxial layer is grown over the "capped" substrate so that a depletion region can be formed in the device under suitable reverse bias. A heavily doped epitaxial layer is then grown over the lightly doped epitaxial layer.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: July 11, 1995
    Assignee: GI Corporation
    Inventors: Joseph Chan, Dennis Garbis, Lawrence Laterza, Gregory Zakaluk
  • Patent number: 5360509
    Abstract: Significant reductions in the cost of fabrication of epitaxial semiconductor devices without sacrifice of functional characteristics is achieved by eliminating the conventional but costly polishing procedure, instead subjecting the substrate to grinding, cleaning and etching processes in which the grinding removes material from the surface to a depth of at least 65 microns and the etching further removes material to a depth of about 6-10 microns, the grinding preferably being carried out in two steps, the first being a coarse step and the second being a fine step, with the rotated grinding elements dwelling at their respective last grinding positions for a short period of time. The result is the equivalent of the prior art polishing procedure which took considerably longer to carry out and which therefore was much more costly.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: November 1, 1994
    Assignee: GI Corporation
    Inventors: Gregory Zakaluk, Dennis Garbis, Joseph Y. Chan, John Latza, Lawrence LaTerza
  • Patent number: 5324685
    Abstract: An all epitaxial process performed entirely in a CVD reactor is employed to grow heavily doped layer on lightly doped layer on a heavily doped substrate, eliminating the need for separate diffusion, even for high impurity concentrations. The process starts with a heavily doped silicon substrate of carrier concentration typically greater than 1.times.10.sup.19 per cm.sup.3. To minimize outdiffusion, the substrate is "capped" by growing very thin and heavily doped silicon layers which are depleted by hydrogen purges. A first epitaxial layer is grown over the "capped" substrate. This layer is relatively lightly doped, having a resistivity of more than 200 ohm.cm. A second epitaxial layer is then grown over the first epitaxial layer. The second epitaxial layer has a polarity opposite to that of the substrate and is heavily doped to a resistivity of less than 0.005 ohm cm.
    Type: Grant
    Filed: February 9, 1993
    Date of Patent: June 28, 1994
    Inventors: Reinhold Hirtz, Gregory Zakaluk, Joseph Chan, Dennis Garbis, Lawrence Laterza, Ali Salih