Abstract: A method of forming a structure for etch masking that includes forming first dielectric spacers on sidewalls of a plurality of mandrel structures and forming non-mandrel structures in space between adjacent first dielectric spacers. Second dielectric spacers are formed on sidewalls of an etch mask having a window that exposes a connecting portion of a centralized first dielectric spacer. The connecting portion of the centralized first dielectric spacer is removed. The mandrel structures and non-mandrel structures are removed selectively to the first dielectric spacers to provide an etch mask. The connecting portion removed from the centralized first dielectric spacer provides an opening connecting a first trench corresponding to the mandrel structures and a second trench corresponding to the non-mandrel structures.

Abstract: The present invention is an integrated cable modem tuner. In one embodiment, the upstream path and the downstream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and digital receiver portion that is integrated on a common semiconductor substrate with the power amplifier of the upstream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the cable modem appears to be a single chip configuration to the user.

Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One method includes generating the regulated voltage through controlled closing and opening of a series switch element and shunt switch element. This method includes closing the series switch element during a first period, the series switch element comprising a plurality of series switch elements segments. The method includes applying a switching gate voltage to gates of series switching transistors of a subset of the plurality of series switch elements segments of the series switch element, wherein only the series switching transistors of the subset of the plurality of series switch elements segments of the series switch element turn on, while series protection transistor of more than the subset of the plurality of series switch elements segments of the series switch element turn on. The shunt switch element during is closed during a second period.

Abstract: Embodiments for at methods, apparatus and systems for operating a voltage regulator are disclosed. One apparatus includes a switching voltage regulator, wherein the switching voltage regulator includes a series switch element, a shunt switch element, a switching controller and a switched output filter. The switching controller is configured to generate a switching voltage through controlled closing and opening of the series switch element and the shunt switch element. The switched output filter filters the switching voltage and generates a regulated output voltage, wherein the switched output filter includes a plurality of capacitors that are selectively included within the switched output filter.

Abstract: The present invention is an integrated set-top box. In one embodiment, the up-stream path and the down-stream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and a digital receiver portion that is integrated on the common semiconductor substrate with a power amplifier of the up-stream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the set-top box appears to be a single chip configuration to the user.

Abstract: Embodiments for at methods, apparatus and systems for operating a voltage regulator are disclosed. One method includes generating, by a switching controller, a switching voltage through controlled closing and opening of a series switch element and a shunt switch element. Further, the method includes generating, by a switchable output filter, a regulated output voltage by filtering the switching voltage, wherein the switchable output filter comprises a plurality of capacitors that are selectively included within the switchable output filter.

Abstract: The present invention is an integrated cable modem tuner. In one embodiment, the upstream path and the downstream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and digital receiver portion that is integrated on a common semiconductor substrate with the power amplifier of the upstream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the cable modem appears to be a single chip configuration to the user.

Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One apparatus includes a voltage regulator. The voltage regulator includes regulator circuitry for generating a regulated voltage from a first power supply and a second power supply, and voltage spike protection circuitry for voltage-spike-protecting the regulator circuitry. The voltage spike protection circuitry includes a charge-storage circuit, and at least one switching element, wherein the at least one switching element comprises a plurality of switching block segments. The charge-storage circuit includes charge-storage circuit segments, and each charge-storage circuit segment is physically closer to at least one of the plurality of switching block segments the charge-storage circuit segment protects, than any other switching block segment.

Abstract: Another embodiment includes a voltage regulator. The voltage regulator includes a series switch element connected between a first voltage supply and a common node, the series switch element comprising an NMOS series switching transistor, a shunt switch element connected between the common node and a second voltage supply, the shunt switch element comprising an NMOS shunt switching transistor. The voltage regulator further includes means for closing the series switch element during a first period by applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node, means for closing the shunt switch element during a second period, the shunt switch element comprising an NMOS shunt switching transistor.

Abstract: The present invention is an integrated cable modem tuner. In one embodiment, the upstream path and the downstream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and digital receiver portion that is integrated on a common semiconductor substrate with the power amplifier of the upstream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the cable modem appears to be a single chip configuration to the user.

Abstract: Embodiments for at methods, apparatus and systems for operating a voltage regulator are disclosed. One apparatus includes a switching voltage regulator, wherein the switching voltage regulator includes a series switch element, a shunt switch element, a switching controller and a switched output filter. The switching controller is configured to generate a switching voltage through controlled closing and opening of the series switch element and the shunt switch element. The switched output filter filters the switching voltage and generates a regulated output voltage, wherein the switched output filter includes a plurality of capacitors that are selectively included within the switched output filter.

Abstract: Embodiments for methods and apparatuses for controlling a skew time of switches of a switching voltage regulator are disclosed. One method includes generating a switching voltage through closing and opening of a series switch and a shunt switch as controlled by a series switch control signal and a shunt switch control signal. An error signal is generated that is proportional to a relative displacement of an on-interval of the series switch and an off-interval of the shunt switch. A relative delay of the series switch control signal and the shunt switch control signal is adjusted based on the error signal, and a regulated output voltage is generated based upon the switching voltage.

Abstract: An apparatus and method is disclosed for adjusting a gain of an amplifier assembly array. The amplifier assembly array includes a first stage to provide an amplified signal based upon an input signal. The first stage has a variable gain controlled in response to one or more gain control signals. An Automatic Gain Control (AGC) module generates the one or more gain control signals according to a ramp function in response to a power level of the amplified signal. The first stage may include a first low noise amplifier (LNA) to amplify the input signal to provide a first amplified input signal and a second LNA to amplify a second input signal to provide a second amplified signal. A switch selects between the amplified signal and the second amplified signal to provide the amplified signal. The amplifier assembly array may additionally include a second stage to provide a second amplified signal based upon the amplified signal.

Abstract: An active splitter circuit arrangement includes a first amplification module having a number of first input ports and first output ports. The first amplification module is configured to provide first stage amplification to a received input signal and produce from the amplified input signal a number of output signals, each substantially matching the input signal. Also included is a first gain control device configured to control a gain of the first amplification module. Next, a number of second amplification modules corresponding to the number of output signals has a number of second input ports respectively coupled to the first output ports. Each second amplification module is configured to receive a control signal from the second gain control device, provide second stage amplification to a corresponding one of the number of output signals based upon the control signal and produce an amplified output signal.

Abstract: A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.

Abstract: Embodiments for at least one method and apparatus of controlling a dead time of a switching voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The method included generating the switching voltage through controlled closing and opening of a series switch element and a shunt switch element, wherein the dead time comprises time that both the series switch element and the shunt switch element are open. The duration of the dead time is adjusted based on a rate of change of the switching voltage.

Abstract: An active splitter circuit arrangement includes a first amplification module having a number of first input ports and first output ports. The first amplification module is configured to provide first stage amplification to a received input signal and produce from the amplified input signal a number of output signals, each substantially matching the input signal. Also included is a first gain control device configured to control a gain of the first amplification module. Next, a number of second amplification modules corresponding to the number of output signals has a number of second input ports respectively coupled to the first output ports. Each second amplification module is configured to receive a control signal from the second gain control device, provide second stage amplification to a corresponding one of the number of output signals based upon the control signal and produce an amplified output signal.

Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One method includes generating the regulated voltage through controlled closing and opening of a series switch element and shunt switch element. This method includes closing the series switch element during a first period, the series switch element comprising a plurality of series switch elements segments. The method includes applying a switching gate voltage to gates of series switching transistors of a subset of the plurality of series switch elements segments of the series switch element, wherein only the series switching transistors of the subset of the plurality of series switch elements segments of the series switch element turn on, while series protection transistor of more than the subset of the plurality of series switch elements segments of the series switch element turn on. The shunt switch element during is closed during a second period.

Abstract: Embodiments for at least one method and apparatus of controlling a bypass resistance of a voltage regulator are disclosed. One method includes generating a regulated output voltage based upon a switching voltage. The switching voltage is generated through controlled closing and opening of a series switch element and a shunt switch element, the series switch element and the shunt switch element being connected between voltages based on an input voltage. Control of a duty cycle of the switching voltage is provided by sensing and feeding back the regulated output voltage. The bypass resistance is controlled based on an integration of a difference between the duty cycle and a maximum duty cycle.

Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.