Patents by Inventor Lawrence Miranda

Lawrence Miranda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MANAGING DIELECTRIC STRESS OF A MEMORY DEVICE USING CONTROLLED RAMPING SLOPES
    Publication number: 20230026558
    Abstract: Control logic in a memory device causes a first set of pulses corresponding to a first voltage ramp slope level to be applied to a memory cell during a first time interval of an execution of a memory access operation. In response to determining a transition time has been reached, the control logic causes a second set of pulses corresponding to a second voltage ramp slope level to be applied to the memory cell during a second time interval of the execution of the memory access operation, wherein the first voltage ramp slope level and the second voltage ramp slope level are different.
    Type: Application
    Filed: October 5, 2022
    Publication date: January 26, 2023
    Inventors: Sheyang Ning, Lawrence Miranda
  • Managing dielectric stress of a memory device using controlled ramping slopes
    Patent number: 11494084
    Abstract: Control logic in a memory device identifies a request to execute a memory access operation on the memory cell. A first set of pulses corresponding to a first voltage ramp slope level is caused to be applied to the memory cell during a first time interval of the memory access operation. The control logic causes a second set of pulses corresponding to a second voltage ramp slope level to be applied to the memory cell during a second time interval of the execution of the memory access operation, wherein the first slope level and the second slope level are different.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: November 8, 2022
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Sheyang Ning, Lawrence Miranda
  • MANAGING DIELECTRIC STRESS OF A MEMORY DEVICE USING CONTROLLED RAMPING SLOPES
    Publication number: 20220187995
    Abstract: Control logic in a memory device identifies a request to execute a memory access operation on the memory cell. A first set of pulses corresponding to a first voltage ramp slope level is caused to be applied to the memory cell during a first time interval of the memory access operation. The control logic causes a second set of pulses corresponding to a second voltage ramp slope level to be applied to the memory cell during a second time interval of the execution of the memory access operation, wherein the first slope level and the second slope level are different.
    Type: Application
    Filed: December 11, 2020
    Publication date: June 16, 2022
    Inventors: Sheyang Ning, Lawrence Miranda