Patents by Inventor Lawrence R. Skrenes

Lawrence R. Skrenes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6426672
    Abstract: A signal processing circuit can be used to select between a high bias current and good noise performance or a low bias current and poorer noise performance. The circuit comprises an input device having high impedance and low noise characteristics. A first current source provides a minimal current level through the input device. Additional current sources provide additional current through the input device to improve noise performance of the circuit. The additional current sources can be switched into the circuit when improved noise performance is required, and switched out of the circuit to conserve power when improved noise performance is not required.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: July 30, 2002
    Assignee: General Electric Company
    Inventors: Scott W. Petrick, Lawrence R. Skrenes, Douglas E. Sease, Richard D. Baertsch
  • Patent number: 6407770
    Abstract: A technique is described for detecting defects such as short circuits in a device such as a discrete pixel detector used in a digital x-ray system. The technique employs test circuits associated with each row driver of the detector. The test circuits are enabled by a test enable signal, and the row driver sequentially enables the rows of the detector, along with the individual test circuits. In a test sequence, output signals from the row test circuits are monitored to identify whether a defect, such as a short circuit, is likely to exist in the row or row driver. The test circuitry adds only minimal area and complexity to the row driver function, providing a high degree of test coverage at a low cost, with minimal likelihood of test circuitry-induced failures.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: June 18, 2002
    Assignee: General Electric Company
    Inventors: Scott A. Bielski, Lawrence R. Skrenes, Yusuf A. Haque
  • Patent number: 6359967
    Abstract: A discrete pixel detector is charge compensated in a plurality of scan modes. In each scan mode a different number of rows of the detector is enabled, and signals produced at discrete pixel locations are read at the detector columns. Charges due to parasitic capacitance between the rows and columns are compensated and balanced by applying a compensation voltage to rows not enabled. The number of rows receiving the compensation voltage varies depending upon the number of enabled rows in each scan mode. A single compensation voltage may be used by applying the compensation voltage to a fixed multiple of the number of enabled rows in each scan mode.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: March 19, 2002
    Assignee: General Electric Company
    Inventors: Scott A. Bielski, Scott W. Petrick, Lawrence R. Skrenes
  • Patent number: 6329848
    Abstract: Sample and hold circuits and methods to reduce distortion. A signal to be sampled is connected across a capacitor through a field effect device, which field effect device is turned off when the sample voltage across the capacitor is to be held. When the field effect device coupling the sample voltage to the capacitor is turned on, the body and gate voltages of the field effect device are made to have a fixed voltage relative to the voltage being sampled, so that the characteristics of the field effect device are unaffected by signal variations during sampling or between samples. Exemplary embodiments are disclosed.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: December 11, 2001
    Assignee: Maxim Integrated Products, Inc.
    Inventors: David Maes, Lawrence R. Skrenes
  • Patent number: 5604347
    Abstract: Row variable offsets in a large area solid state x-ray detector are compensated for. Initially, a calibration is performed to determine the row variable offsets. The calibration is achieved by measuring the average offset of each row. During normal operation, this offset is compensated for in a converting circuit. The required signal range of the converting circuit is consequently reduced.
    Type: Grant
    Filed: July 13, 1995
    Date of Patent: February 18, 1997
    Assignee: General Electric Company
    Inventors: Scott W. Petrick, Lawrence R. Skrenes, Jean C. Morvan, Paul R. Granfors
  • Patent number: 5389775
    Abstract: An x-y-addressed imager assembly includes a common electrode having more than two electrical contact points disposed at selected intervals along each edge of the common electrode that corresponds to a lateral boundary of the imager assembly. The selected intervals are typically about equal in length and not greater than about 12% of the length of the edge of the common electrode. The multiple electrical contacts along the common electrode provide low impedance and low magnetic loop area for signals passing along the common electrode to readout and drive circuits.
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: February 14, 1995
    Assignee: General Electric Company
    Inventors: Robert F. Kwasnick, Scott W. Petrick, Lawrence R. Skrenes