Patents by Inventor Lawrence W. Lomelino

Lawrence W. Lomelino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9898427
    Abstract: A method and apparatus for accessing multiple storage devices from multiple hosts without use of remote direct memory access (RDMA) as disclosed herein include: providing a data store switch fabric enabling data communications between a data storage access system and a plurality of compute nodes, each compute node having integrated compute capabilities, data storage, and a network interface controller (Host NIC); providing a plurality of physical data storage devices; providing a host bus adapter (HBA) in data communication with the plurality of physical data storage devices and the plurality of compute nodes via the data store switch fabric, the HBA including at least one submission queue and a corresponding shadow queue; receiving an input/output (I/O) request from the plurality of compute nodes; including an element of the I/O request to the at least one submission queue; and including additional information related to the element of the at least one submission queue to the corresponding shadow queue.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: February 20, 2018
    Assignee: Apeiron Data Systems
    Inventors: James R Bergsten, Lawrence W Lomelino, Christopher Christ, Steven R Lahr
  • Publication number: 20170024334
    Abstract: A method and apparatus for accessing multiple storage devices from multiple hosts without use of remote direct memory access (RDMA) as disclosed herein include: providing a data store switch fabric enabling data communications between a data storage access system and a plurality of compute nodes, each compute node having integrated compute capabilities, data storage, and a network interface controller (Host NIC); providing a plurality of physical data storage devices; providing a host bus adapter (HBA) in data communication with the plurality of physical data storage devices and the plurality of compute nodes via the data store switch fabric, the HBA including at least one submission queue and a corresponding shadow queue; receiving an input/output (I/O) request from the plurality of compute nodes; including an element of the I/O request to the at least one submission queue; and including additional information related to the element of the at least one submission queue to the corresponding shadow queue.
    Type: Application
    Filed: September 30, 2016
    Publication date: January 26, 2017
    Inventors: James R. Bergsten, Lawrence W. Lomelino, Christopher Christ, Steven R. Lahr
  • Patent number: 9483431
    Abstract: Various embodiments for implementing a method and apparatus for accessing multiple storage devices from multiple hosts without use of remote direct memory access (RDMA) as disclosed herein include: providing a data store switch fabric enabling data communications between a data storage access system and a plurality of compute nodes, each compute node having integrated compute capabilities, data storage, and a network interface controller (Host NIC); providing a plurality of physical data storage devices; providing a host bus adapter (HBA) in data communication with the plurality of physical data storage devices and the plurality of compute nodes via the data store switch fabric, the HBA including at least one submission queue and a corresponding shadow queue; receiving an input/output (I/O) request from the plurality of compute nodes; including an element of the I/O request to the at least one submission queue; and including additional information related to the element of the at least one submission queue to
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: November 1, 2016
    Assignee: Apeiron Data Systems
    Inventors: James R Bergsten, Lawrence W Lomelino, Christopher Christ, Steven R Lahr
  • Publication number: 20150248366
    Abstract: Various embodiments for implementing a method and apparatus for accessing multiple storage devices from multiple hosts without use of remote direct memory access (RDMA) as disclosed herein include: providing a data store switch fabric enabling data communications between a data storage access system and a plurality of compute nodes, each compute node having integrated compute capabilities, data storage, and a network interface controller (Host NIC); providing a plurality of physical data storage devices; providing a host bus adapter (HBA) in data communication with the plurality of physical data storage devices and the plurality of compute nodes via the data store switch fabric, the HBA including at least one submission queue and a corresponding shadow queue; receiving an input/output (I/O) request from the plurality of compute nodes; including an element of the I/O request to the at least one submission queue; and including additional information related to the element of the at least one submission queue to
    Type: Application
    Filed: May 14, 2015
    Publication date: September 3, 2015
    Inventors: James R Bergsten, Lawrence W Lomelino, Christopher Christ, Steven R Lahr
  • Patent number: 5867675
    Abstract: A system for transferring data includes structure (i.e, hardware, software, a combination thereof) for requesting data from a second bus, which data is destined for a first bus; and structure for gaining ownership of the second bus for the purpose of transferring the data from the second bus to the first bus, which structure includes substructure for waiting a programmably variable amount of time to see if additional data is requested by the first bus, before relinquishing control of the second bus.
    Type: Grant
    Filed: August 6, 1996
    Date of Patent: February 2, 1999
    Assignee: Compaq Computer Corp
    Inventors: Lawrence W. Lomelino, Ryan A. Callison
  • Patent number: 5848251
    Abstract: The present invention relates to a secondary channel for a point-to-point burst style bus associated with a computer system. The point-to-point bus may originate as a standardized bus from a fibre channel controller. The point-to-point bus connects to another circuit which may be a bridge circuit, a minicomputer or a peripheral device. A secondary channel is also connected to the point-to-point bus and is adapted to share the bus by receiving information having predetermined addresses. The information recieved by the secondary channel can be stored in a memory that is shared with a processor. Command/control information can be extracted from the point-to-point bus before data is transferred through the bridge circuit in order to allow the data to be acted on more quickly by processing/storage devices since the control data was already made available to the storage devices via the secondary channel.
    Type: Grant
    Filed: August 6, 1996
    Date of Patent: December 8, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Lawrence W. Lomelino, Thomas W. Grieff, Michael L. Sabotta