Abstract: An internal bus mechanism for implementation in a computing system characterized by having a limited number of primitive general function instructions provided for controlling all system operations. The architecture of the internal bus mechanism defines a bus instruction format which specifies the bus unit being requested, the operation being requested, and sufficient data to specify the operands necessary to perform the requested operations. Two basic classes of instructions are provided, one wherein the CPU waits until a requested operation is performed and the other wherein the CPU issues an instruction to a bus unit and proceeds to execute further instructions in parallel with the operation of the bus unit. If desired, various units of the memory hierarchy may be designated and operated as bus units.

Abstract: A character generator for a raster printer which prints in the page mode. Input format data is generated in response to the input print data which defines for each pattern the position of the pattern on the page, the size of the pattern and the location of the pattern in the raster pattern storage. The format data is accessed for all patterns beginning within a predetermined plurality of scan lines and raster data is accessed in response to the format data to store in an output buffer the raster pattern data in the sequence, size and position defined by the format data. The raster pattern data can then be accessed to control a printer to print on a print medium a pattern defined by the input print data.