Patents by Inventor Lay Chee

Lay Chee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5966607
    Abstract: A process for forming metal salicide layers on an MOS transistor structure that reduces the risk of forming metal silicide bridges between source/drain regions and a polysilicon gate. The process includes the use of a uni-directional ion metal plasma deposition step to deposit a metal layer on the surface of a MOS transistor structure such that the ratio of the metal layer thickness on the surface of a gate sidewall spacers to the metal layer thickness on the surface of a polysilicon gate is no greater than 0.2. The relatively thin metal layer on the surface of the gate sidewall spacer reduces the possibility of forming metal silicide defects.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: October 12, 1999
    Assignee: National Semicoinductor Corporation
    Inventors: Lay Chee, Abdalla Naem