Patents by Inventor Le TA

Le TA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11307722
    Abstract: Provided are a display panel, a display device and a method for preparing a display panel. The display panel includes an opening region, a transition region, and a display region. The display region at least partially surrounds the opening region, and the transition region is disposed between the display region and the opening region. The transition region of the display panel is further provided with at least one wall structure, and the at least one wall structure surrounds the opening region. The display panel further includes a substrate and a sub-pixel array disposed on the substrate and disposed in the display region, a first organic encapsulation layer, a second organic encapsulation layer, and a barrier structure. The first organic encapsulation layer is disposed on a side of the at least one wall structure facing the display region.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: April 19, 2022
    Assignee: Xiamen Tianma Micro-Electronics Co., Ltd.
    Inventors: Fang Chen, Le Ta, Zhiqiang Xia
  • Patent number: 11195484
    Abstract: The present disclosure provides a display panel, a method of driving the display panel and a display device. Each signal input sub-circuitry of the display panel includes at least two transistors. A same control signal is applied to control signal lines corresponding to a same signal input sub-circuitry, different control signals are applied to control signal lines corresponding to different signal input sub-circuitries, and time periods within which the different control signals are at active levels are staggered from each other. A sum of width-to-length ratios of channels of the at least two transistors is equal to a first predetermined value, and an overlapping area of the gate electrode of each of the at least two transistors relative to an active layer of the transistor is smaller than a second predetermined value in a direction perpendicular to a base substrate of the display panel.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: December 7, 2021
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lei Li, Jun Fan, Le Ta, Yusheng Liu, Yongqiang Zhang, Mei Li, Yafei Li, Peng Liu, Zhixuan Guo
  • Publication number: 20210286471
    Abstract: Provided are a display panel, a display device and a method for preparing a display panel. The display panel includes an opening region, a transition region, and a display region. The display region at least partially surrounds the opening region, and the transition region is disposed between the display region and the opening region. The transition region of the display panel is further provided with at least one wall structure, and the at least one wall structure surrounds the opening region. The display panel further includes a substrate and a sub-pixel array disposed on the substrate and disposed in the display region, a first organic encapsulation layer, a second organic encapsulation layer, and a barrier structure. The first organic encapsulation layer is disposed on a side of the at least one wall structure facing the display region.
    Type: Application
    Filed: June 2, 2021
    Publication date: September 16, 2021
    Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
    Inventors: Fang CHEN, Le TA, Zhiqiang XIA
  • Publication number: 20210166645
    Abstract: The present disclosure provides a display panel, a method of driving the display panel and a display device. Each signal input sub-circuitry of the display panel includes at least two transistors. A same control signal is applied to control signal lines corresponding to a same signal input sub-circuitry, different control signals are applied to control signal lines corresponding to different signal input sub-circuitries, and time periods within which the different control signals are at active levels are staggered from each other. A sum of width-to-length ratios of channels of the at least two transistors is equal to a first predetermined value, and an overlapping area of the gate electrode of each of the at least two transistors relative to an active layer of the transistor is smaller than a second predetermined value in a direction perpendicular to a base substrate of the display panel.
    Type: Application
    Filed: April 16, 2020
    Publication date: June 3, 2021
    Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lei LI, Jun FAN, Le TA, Yusheng LIU, Yongqiang ZHANG, Mei LI, Yafei LI, Peng LIU, Zhixuan GUO