Patents by Inventor Leandro GRASSO

Leandro GRASSO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230246550
    Abstract: In accordance with an embodiment, a method of operating a buck-boost power supply includes operating the buck-boost power supply in a buck mode by providing a PWM signal to a first half-bridge circuit, and turning on a charge transfer switch coupled between a first boosted supply node of a second driver circuit coupled to the first half-bridge circuit and a second boosted supply node of a second driver circuit coupled to a second half-bridge circuit when a voltage between the second boosted supply node and an output of the second half-bridge circuit is below a first threshold; and operating the buck-boost power supply in a boost mode by providing a PWM signal to the second half-bridge circuit, and turning on the charge transfer switch when the voltage between the first boosted supply node and an output of the first half-bridge circuit is below a second threshold.
    Type: Application
    Filed: January 17, 2023
    Publication date: August 3, 2023
    Inventors: Ranieri Guerra, Leandro Grasso, Serena Angela Versace, Francesca Giacoma Mignemi, Nunzio Greco
  • Patent number: 10312821
    Abstract: A rectifier cell includes a first cell branch and a second cell branch that extend in parallel between two opposite nodes receiving an a.c. signal. The first cell branch includes a first pair of transistors arranged with their current paths cascaded, with a first intermediate point in-between. The second cell branch includes a second pair of transistors arranged with their current paths cascaded, with a second intermediate point in-between. Each of the pairs of transistors includes a first transistor with a control terminal coupled to one of the two opposite nodes and a second transistor with a control terminal coupled to the other of the two opposite nodes. The bulks of the transistors receive voltages in order to vary the transistor threshold voltage by bringing the threshold voltage to a first value during forward conduction and to a second value during reverse conduction.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: June 4, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Leandro Grasso, Ranieri Guerra, Giuseppe Palmisano
  • Publication number: 20170288568
    Abstract: A rectifier cell includes a first cell branch and a second cell branch that extend in parallel between two opposite nodes receiving an a.c. signal. The first cell branch includes a first pair of transistors arranged with their current paths cascaded, with a first intermediate point in-between. The second cell branch includes a second pair of transistors arranged with their current paths cascaded, with a second intermediate point in-between. Each of the pairs of transistors includes a first transistor with a control terminal coupled to one of the two opposite nodes and a second transistor with a control terminal coupled to the other of the two opposite nodes. The bulks of the transistors receive voltages in order to vary the transistor threshold voltage by bringing the threshold voltage to a first value during forward conduction and to a second value during reverse conduction.
    Type: Application
    Filed: November 22, 2016
    Publication date: October 5, 2017
    Applicant: STMicroelectronics S.r.l.
    Inventors: Leandro Grasso, Ranieri Guerra, Giuseppe Palmisano
  • Patent number: 9438463
    Abstract: A system may be for the correction of phase and amplitude errors. The system may receive a first input signal and a second input signal and supply a first output signal and a second output signal. The system may include two adders that supply the first and second output signals, respectively. The two adders may be configured for computing a sum of the first and second input signals, and multiplying the weighted sum by a third coefficient. Moreover, the first coefficient or the second coefficient of the first adder may be variable to enable correction of the phase errors, and the third coefficient of the second adder may be variable to enable correction of the amplitude errors.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: September 6, 2016
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Leandro Grasso, Ranieri Guerra, Giuseppe Palmisano
  • Publication number: 20160094379
    Abstract: A system may be for the correction of phase and amplitude errors. The system may receive a first input signal and a second input signal and supply a first output signal and a second output signal. The system may include two adders that supply the first and second output signals, respectively. The two adders may be configured for computing a sum of the first and second input signals, and multiplying the weighted sum by a third coefficient. Moreover, the first coefficient or the second coefficient of the first adder may be variable to enable correction of the phase errors, and the third coefficient of the second adder may be variable to enable correction of the amplitude errors.
    Type: Application
    Filed: June 26, 2015
    Publication date: March 31, 2016
    Inventors: Leandro GRASSO, Ranieri GUERRA, Giuseppe PALMISANO