Patents by Inventor Leathen She

Leathen She has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low cost fabrication of double box back gate silicon-on-insulator wafers with built-in shallow trench isolation in back gate layer
    Patent number: 8227865
    Abstract: A semiconductor wafer structure for manufacturing integrated circuit devices includes a bulk substrate; a lower insulating layer formed on the bulk substrate, the lower insulating layer formed from a pair of separate insulation layers having a bonding interface therebetween; an electrically conductive layer formed on the lower insulating layer, the electrically conductive layer further having one or more shallow trench isolation (STI) regions formed therein; an etch stop layer formed on the electrically conductive layer and the one or more STI regions; an upper insulating layer formed on the etch stop layer; and a semiconductor layer formed on the upper insulating layer. A subsequent active area level STI scheme, in conjunction with front gate formation over the semiconductor layer, is also disclosed.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Robert H. Dennard, David R. Greenberg, Amlan Majumdar, Leathen She, Jeng-Bang Yau