Abstract: An amplifying device includes a base plate and an integrated circuit (IC) package mounted on the base plate. The IC package includes a radio frequency (RF) output terminal and a power switching metal-oxide-semiconductor field-effect transistor (MOSFET) die mounted on the RF output terminal. The amplifying device also includes impedance matching circuitry coupled to the power switching MOSFET and the RF output terminal and an insulator substrate mounted on the base plate having thermal conductivity to provide electrical isolation and thermal transfer from the RF output terminal.

Abstract: According to one embodiment, a solid state amplifying device is disclosed. The amplifying device comprises a first input bond pad and a first input connection bonded to the first input bond pad. The amplifying device also includes a second input bond pad and a second input connection bonded to the second input bond pad. An equivalent magnitude of current is supplied to the first and second input bond pads.

Abstract: According to one embodiment, a solid state amplifying device is disclosed. The amplifying device comprises a first input bond pad and a first input connection bonded to the first input bond pad. The amplifying device also includes a second input bond pad and a second input connection bonded to the second input bond pad. An equivalent magnitude of current is supplied to the first and second input bond pads.

Abstract: According to one embodiment, a circuit is disclosed. The circuit comprises a solid state power amplifying device, an input impedance matching circuit and an output impedance matching circuit coupled to the solid state amplifying device. The input impedance matching circuit includes an input pitchfork trace pattern. The output impedance matching circuit includes an output pitchfork trace pattern. The circuit further discloses an input bias circuit and an output bias circuit.

Abstract: According to one embodiment, a circuit is disclosed. The circuit comprises a solid state power amplifying device, an input impedance matching circuit and an output impedance matching circuit coupled to the solid state amplifying device. The input impedance matching circuit includes an input pitchfork trace pattern. The output impedance matching circuit includes an output pitchfork trace pattern. The circuit further discloses an input bias circuit and an output bias circuit.

Abstract: According to one embodiment, a solid state amplifying device is disclosed. The amplifying device comprises a first input bond pad and a first input connection bonded to the first input bond pad. The amplifying device also includes a second input bond pad and a second input connection bonded to the second input bond pad. An equivalent magnitude of current is supplied to the first and second input bond pads.

Abstract: The present invention provide a plurality of layered substrates for semiconductor packages. The substrates include, for example, a metal matrix composite layer and at least one carrier layer having a coefficient of thermal expansion and a thermal conductivity greater than the metal matrix composite. In the preferred embodiment, the metal matrix composite includes between approximately 50% to 95% refractory metal with the remainder copper. Suitable carrier layer materials include, for example, copper. So configured, the layered substrates provide improved rigidity and thermal characteristics for matching with ceramic materials.

Abstract: The base-to-emitter bias voltage and current of a high frequency transistor, operating class AB or class A, is derived from a semiconductive bias device consisting of a semiconductive diode junction fed with current from a constant current source to derive a V.sub.BE voltage thereacross which is the bias source voltage. This source voltage is applied across the base-to-emitter junction of the RF transistor via the intermediary of a positive temperature coefficient silicon resistor. The diode and silicon resistor are packaged together for mounting on a heat sink common to the transistor, whereby the transistor is compensated for temperature dependent changes in V.sub.BE and h.sub.FE.

Abstract: A semiconductor package for containing two individual devices such that they may be externally connected in a pushpull relationship. Two transistors, each having an input and output pad are formed on the same dielectric wafer, in a spaced relationship with each other and a ground plane so as to form two separate transmission line paths. The transistors are wired either in a grounded emitter or grounded base configuration. A shunt inductor is formed by a metallized strip or lead bond from the collector of one transistor to the collector of the other transistor. This inductor reduces the influence of the parasitic capacitance in the equivalent output circuit of the transistors. Since the collectors of both transistors are at the same DC level it is not necessary to include a DC blocking capacitor in series with the inductor.

Abstract: A semiconductor package for containing two individual devices such that they may be externally connected in a push-pull relationship. Two transistors, each having an input and output pad are formed on the same dielectric wafer, in a spaced relationship with each other and a ground plane so as to form two separate transmission line paths. The transistors are wired either in a grounded emitter or grounded base configuration. A shunt inductor is formed by a metallized strip or lead bond from the collector of one transistor to the collector of the other transistor. This inductor reduces the influence of the parasitic capacitance in the equivalent output circuit of the transistors. Since the collectors of both transistors are at the same DC level it is not necessary to include a DC blocking capacitor in series with the inductor.