Abstract: An electronic data storage memory performs logic operations on the data values existing in its storage cells to eliminate the number of necessary memory accesses during bitblts. The time in which a bitblt can be completed in an image processing system is prolonged because of the number of memory cycles performed during a "raster operation". Thus, to reduce the number of necessary memory cycles, simple logic operations are performed in image processor memory so that a raster operation may take place without having to read, for example, the destination operand from memory. Since a bitblt performs a raster operation on each pixel in the bitblt block, the reduction in memory access time is proportional to the size of the bitblt block.

Abstract: The number of required clock periods in a bit aligned block transfer operation may be reduced by analyzing the logical relationship between source, destination and pattern operands prior to fetching these operands from memory. If the result of the raster operation can be determined without actually using the value of any of the operands, the result is provided without reading memory values. When the raster operation will have no effect on the existing destination operand, the write operation is also canceled.

Abstract: An electronic data storage memory performs logic operations on the data values existing in its storage cells to eliminate the number of necessary memory accesses during bitblts. The time in which a bitblt can be completed in an image processing system is prolonged because of the number of memory cycles performed during a "raster operation". Thus, to reduce the number of necessary memory cycles, simple logic operations are performed in image processor memory so that a raster operation may take place without having to read, for example, the destination operand from memory. Since a bitblt performs a raster operation on each pixel in the bitblt block, the reduction in memory access time is proportional to the size of the bitblt block.

Abstract: The number of required clock periods in a bit aligned block transfer operation may be reduced by analyzing the logical relationship between source, destination and pattern operands prior to fetching these operands from memory. If the result of the raster operation can be determined without actually using the value of any of the operands, the result is provided without reading memory values. When the raster operation will have no effect on the existing destination operand, the write operation is also canceled.