Patents by Inventor Lee Cheong Chee

Lee Cheong Chee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of making wafer level ball grid array
    Patent number: 7396754
    Abstract: A manufacturing technique that involves embedding one or more semiconductor die into a support substrate and forming conductive traces that lead from die contact pads to redistributed contact pads on the support substrate. Active surfaces of the dice and a working surface of the support substrate are substantially coplanar and the conductive traces are formed on the coplanar surfaces. The redistributed contact pads are sufficiently spaced apart from each other so that conductive balls can be formed thereon. Individual semiconductor device packages are singulated from the support substrate.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: July 8, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Lee Cheong Chee, Sri Ganesh A/L A. Tharumalingam
  • Wafer level ball grid array
    Patent number: 7061123
    Abstract: A manufacturing technique that involves embedding one or more semiconductor die into a support substrate and forming conductive traces that lead from die contact pads to redistributed contact pads on the support substrate. Active surfaces of the dice and a working surface of the support substrate are substantially coplanar and the conductive traces are formed on the coplanar surfaces. The redistributed contact pads are sufficiently spaced apart from each other so that conductive balls can be formed thereon. Individual semiconductor device packages are singulated from the support substrate.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: June 13, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Lee Cheong Chee, Sri Ganesh A. L. A. Tharumalingam