Patents by Inventor Lee-Chung CHEN

Lee-Chung CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11983475
    Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu, Lee-Chung Lu, Yen-Hung Lin, Li-Chun Tien, Yi-Kan Cheng
  • Publication number: 20240143455
    Abstract: A virtual machine backup method, performed by a first host, includes: capturing a request to write data from a virtual machine to a hard disk image file, wherein the request includes written data and input and output location information, copying the written data to a temporary storage area, calculating a first key of the written data, storing the first key, the input and output location information into a first resource location structure, pausing an operation of the virtual machine and generating a second resource location structure according to the first resource location structure, the first key and a second key, and outputting a backup data set to a second host according to the second resource location structure, wherein the backup data set includes the second resource location structure and only one of existing data and the written data when the first key and the second key are the same.
    Type: Application
    Filed: May 15, 2023
    Publication date: May 2, 2024
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Lee Chung CHEN, Li Hao CHIANG, Gin CHI, Wei Jie HSU, Jiann Wen WANG, Wen Dwo HWANG
  • Patent number: 11967596
    Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
  • Patent number: 11935894
    Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fong-yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin, Jerry Chang Jui Kao, Sheng-Hsiung Chen, Chin-Chou Liu
  • Publication number: 20240088024
    Abstract: A semiconductor device includes a transistor layer, a first via layer over the transistor layer, a first metallization layer over the first via layer, the first metallization layer including first conductors having long axes extending substantially in a first direction, a second via layer over the first metallization layer, and a conductive deep via extending in the second via layer, the first metallization layer, and the first via layer. The first conductors represent a majority of conductive material in the first metallization layer, and a size of the deep via in the first direction in the first metallization layer is substantially less than a minimum length of the first conductors in the first metallization layer.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Ta-Pen GUO, Chien-Ying CHEN, Li-Chun TIEN, Lee-Chung LU
  • Publication number: 20160147824
    Abstract: A method for processing time series is disclosed. In the method, the time series is distributed into a plurality of indexes. A statistical method is applied to the data in each index for generating corresponding statistical result. The statistical result is the value with respect to the every index, and also the record with respect to the indexes in the time series. The statistical result for the every index is temporarily buffered. After that, a new input time series is compared with the statistical result for every index so as to select one of the indexes. The new input data is therefore inserted to the selected index. The statistical method is then applied to this selected index again. A new statistical result is generated. The record is updated as referring to the selected index and the new corresponding statistical result.
    Type: Application
    Filed: December 8, 2014
    Publication date: May 26, 2016
    Inventors: YUNG-CHUNG KU, TSUNG-JUNG TSAI, LEE-CHUNG CHEN
  • Publication number: 20160140135
    Abstract: A method and an adjustment device for adaptively adjusting a database structure are provided. The adjustment device is arranged between a client and a database. The client generates a database instruction and transmits the database instruction to the database. The database executes the database instruction and accordingly generates an interpretable execution result to the adjustment device. The adjustment device determines whether the database structure needs to be adjusted. When the database structure needs to be adjusted, the adjustment device adjusts the database structure configured in the database according to the execution result. When the database structure needs not to be adjusted, the adjustment device transmits the execution result back to the client. Accordingly, when the engineer develops an application system, they do not consider whether to redesign the new database structure, thereby the method and the adjustment device can improve the system development efficiency.
    Type: Application
    Filed: December 8, 2014
    Publication date: May 19, 2016
    Inventors: YUNG-CHUNG KU, TSUNG-JUNG TSAI, LEE-CHUNG CHEN
  • Patent number: 9262466
    Abstract: A data processor and a data processing method are provided. The data processor is arranged between a client and a database system to determine in advance whether a user instruction sent from the client updates data of the database system. When the data processor determines that the user instruction does not update data of the database system, the data processor sends the predefined data to the client and restrains the user instruction to the database system. Accordingly, the data processor can assist the database system to process the user instruction, so as to reduce in advance the enormous volume of data processing that the database system is requested upon.
    Type: Grant
    Filed: March 23, 2014
    Date of Patent: February 16, 2016
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Yung-Chung Ku, Jonathan Tsai, Lee Chung Chen
  • Publication number: 20150149422
    Abstract: A data processor and a data processing method are provided. The data processor is arranged between a client and a database system to determine in advance whether a user instruction sent from the client updates data of the database system. When the data processor determines that the user instruction does not update data of the database system, the data processor sends the predefined data to the client and restrains the user instruction to the database system. Accordingly, the data processor can assist the database system to process the user instruction, so as to reduce in advance the enormous volume of data processing that the database system is requested upon.
    Type: Application
    Filed: March 23, 2014
    Publication date: May 28, 2015
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: YUNG-CHUNG KU, JONATHAN TSAI, LEE CHUNG CHEN
  • Publication number: 20110314203
    Abstract: Resource adjustment methods and systems for virtual machines (VMs) for use in at least one physical device are provided. First, a first VM having a first resource set and a second VM having a second resource set are respectively enabled to enter a suspended state. A first user space address and a second user space address are respectively obtained from a first VM memory page table corresponding to the first VM and a second VM page table corresponding to the second VM, and a first physical memory address corresponding to the first user space address in the physical device and a second physical memory address corresponding to the second user space address in the physical device are obtained from a Hypervisor. The first user space address is mapped to the second physical memory address by the Hypervisor. Then, the first VM is enabled to enter an execution state, and the second VM is stopped.
    Type: Application
    Filed: November 30, 2010
    Publication date: December 22, 2011
    Inventors: Lee-Chung CHEN, Hui-Kuang Chung, Chih-Kai Hu, Chung-Ting Kao