Abstract: Ferroelectric polymer memory modules are described. In an example, a module has a first set of layers including a first ILD layer defining trenches therein, a first electrode layer disposed in the trenches of the first ILD layer, a first conductive polymer layer disposed on the first electrode layer and in the trenches of the first ILD layer, and a ferroelectric polymer layer disposed on the first conductive polymer layer, in and extending beyond the trenches of the first ILD layer. The module also has a second set of layers disposed on the first set of layers to define memory cells therewith. The second set of layers includes a second ILD layer defining trenches therein, a second conductive polymer layer disposed in the trenches of the second ILD layer, and a second electrode layer disposed on the second conductive polymer layer.

Abstract: A method of fabricating a ferroelectric memory module with conducting polymer electrodes, and a ferroelectric memory module fabricated according to the method. The ferroelectric polymer memory module includes a first set of layers including: an ILD layer defining trenches therein; a first electrode layer disposed in the trenches; a first conductive polymer layer disposed on the first electrode layer; and a ferroelectric polymer layer disposed on the first conductive polymer layer. The module further includes a second set of layers including: an ILD layer defining trenches therein; a second conductive polymer layer disposed in the trenches of the ILD layer of the second set of layers; and a second electrode layer disposed on the second conductive polymer layer. The first conductive polymer layer and the second conductive polymer layer cover the electrode layers to provide a reaction and/or diffusion barrier between the electrode layers and the ferroelectric polymer layer.

Abstract: A ferroelectric polymer memory module includes a first set of layers including: a first ILD layer defining trenches therein; a first electrode layer disposed in the trenches of the first ILD layer; a first conductive polymer layer disposed on the first electrode layer and in the trenches of the first ILD layer; and a ferroelectric polymer layer disposed on the first conductive polymer layer and in the trenches of the first ILD layer; and a second set of layers disposed on the first set of layers to define memory cells therewith, the second set of layers including: a second ILD layer defining trenches therein; a second conductive polymer layer disposed in the trenches of the second ILD layer; and a second electrode layer disposed on the second conductive polymer layer.

Abstract: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from at least a portion of the porous matrix, leaving voids defined by the porous matrix in areas previously occupied by the porogen. The resultant structure has a desirably low k value as a result of the porosity and materials comprising the porous matrix and porogen. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.

Abstract: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from at least a portion of the porous matrix, leaving voids defined by the porous matrix in areas previously occupied by the porogen. The resultant structure has a desirably low k value as a result of the porosity and materials comprising the porous matrix and porogen. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.

Abstract: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from at least a portion of the porous matrix, leaving voids defined by the porous matrix in areas previously occupied by the porogen. The resultant structure has a desirably low k value as a result of the porosity and materials comprising the porous matrix and porogen. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.

Abstract: An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to other processing treatments, the porogen is decomposed and removed from at least a portion of the porous matrix, leaving voids defined by the porous matrix in areas previously occupied by the porogen. The resultant structure has a desirably low k value as a result of the porosity and materials comprising the porous matrix and porogen. The composite dielectric layer may be used in concert with other dielectric layers of varying porosity, dimensions, and material properties to provide varied mechanical and electrical performance profiles.

Abstract: Adhesion of high fluorine content films to semiconductor substrates may be improved by forming an intervening adherence layer. The adherence layer may be formed from a plasma gas. In some cases, the adherence layer may be used to adhere photoresist for advanced photolithography processes to silicon substrates.

Abstract: Adhesion of high fluorine content films to semiconductor substrates may be improved by forming an intervening inherence layer. The inherence layer may be formed from a plasma gas. In one embodiment, the inherence layer may be a fluoropolymer film. In some cases, the fluoropolymer film may be used to adhere photoresist for advance photolithography processes to silicon substrates.