Abstract: A voltage generation circuit includes a noise attenuation circuit configured to attenuate a noise of a second power voltage which has a level that is at least two times higher than that of a first power voltage, and a multi-stage voltage pump configured to receive a noise-attenuated second power voltage from the noise attenuation circuit and generate at least one of plural target voltages, each target voltage having a different level. The first and second power voltages are individually input from an external device via different pins or pads.

Abstract: A voltage generation circuit includes a noise attenuation circuit configured to attenuate a noise of a second power voltage which has a level that is at least two times higher than that of a first power voltage, and a multi-stage voltage pump configured to receive a noise-attenuated second power voltage from the noise attenuation circuit and generate at least one of plural target voltages, each target voltage having a different level. The first and second power voltages are individually input from an external device via different pins or pads.

Abstract: A regulator circuit may include a comparison unit configured to compare a reference voltage with a feedback voltage and generate a first switching signal. The regulator circuit may include a current supply unit configured to receive a pumping voltage, and determine a level of a second switching signal in response to the first switching signal. The regulator circuit may include an output driver configured to control the level of the second switching signal in response to an output voltage, receive the pumping voltage, and generate the output voltage in response to the second switching signal. The regulator circuit may include a feedback signal generation unit configured to detect a level of the output voltage and generate the feedback voltage.

Abstract: A regulator circuit may include a comparison unit configured to compare a reference voltage with a feedback voltage and generate a first switching signal. The regulator circuit may include a current supply unit configured to receive a pumping voltage, and determine a level of a second switching signal in response to the first switching signal. The regulator circuit may include an output driver configured to control the level of the second switching signal in response to an output voltage, receive the pumping voltage, and generate the output voltage in response to the second switching signal. The regulator circuit may include a feedback signal generation unit configured to detect a level of the output voltage and generate the feedback voltage.

Abstract: A nonvolatile memory device includes a plurality of global word lines, a plurality of transistors configured to transfer voltages of the global word lines to a plurality of local word lines inside a cell block, and a voltage control unit configured to supply a first negative voltage to a global word line of the plurality of global word lines and configured to charge a bulk region of the plurality of transistors with a second negative voltage.

Abstract: A control voltage generation circuit for generating a control voltage for controlling a high-voltage transistor includes an input node configured to receive a first enable signal; an output node configured to generate the control voltage, a transferor configured to transfer a voltage of the input node to the output node in response to a transfer signal, an enabling voltage driver configured to drive the output node with a high voltage when the first enable signal is enabled, and a disabling voltage driver configured to drive the output node with a negative voltage when a second enable signal is enabled in a negative mode.

Abstract: An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal.

Abstract: A control voltage generation circuit for generating a control voltage for controlling a high-voltage transistor includes an input node configured to receive a first enable signal; an output node configured to generate the control voltage, a transferor configured to transfer a voltage of the input node to the output node in response to a transfer signal, an enabling voltage driver configured to drive the output node with a high voltage when the first enable signal is enabled, and a disabling voltage driver configured to drive the output node with a negative voltage when a second enable signal is enabled in a negative mode.

Abstract: An internal voltage generator and a method of generating an internal voltage are disclosed. The internal voltage generator includes: a charge pumping block configured to perform charge pumping base on a period pulse signal to generate an internal voltage, and output the generated internal voltage to an interval voltage terminal; a voltage detection block configured to detect the voltage level of the internal voltage terminal; a driving voltage supply block configured to supply a first power supply voltage or a second power supply voltage having a higher voltage level than the first power supply voltage as a driving voltage, depending on the detection result of the voltage detection block; and a period pulse generation block configured to drive the period pulse signal to the is driving voltage supplied from the driving voltage supply block. The period pulse signal driven by the second power supply voltage has a longer pulsing period than the period pulse signal driven by the first power supply voltage.

Abstract: An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal.

Abstract: A nonvolatile memory device includes a plurality of global word lines, a plurality of transistors configured to transfer voltages of the global word lines to a plurality of local word lines inside a cell block, and a voltage control unit configured to supply a first negative voltage to a global word line of the plurality of global word lines and configured to charge a bulk region of the plurality of transistors with a second negative voltage.

Abstract: An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal.

Abstract: An internal voltage generator and a method of generating an internal voltage are disclosed. The internal voltage generator includes: a charge pumping block configured to perform charge pumping base on a period pulse signal to generate an internal voltage, and output the generated internal voltage to an interval voltage terminal; a voltage detection block configured to detect the voltage level of the internal voltage terminal; a driving voltage supply block configured to supply a first power supply voltage or a second power supply voltage having a higher voltage level than the first power supply voltage as a driving voltage, depending on the detection result of the voltage detection block; and a period pulse generation block configured to drive the period pulse signal to the is driving voltage supplied from the driving voltage supply block. The period pulse signal driven by the second power supply voltage has a longer pulsing period than the period pulse signal driven by the first power supply voltage.

Abstract: An apparatus for generating a voltage includes a first voltage outputting circuit configured to receive an input voltage and adjust and output a first voltage in accordance with a temperature, a buffer circuit configured to receive the first voltage and output the received first voltage as a second voltage at an output node of the buffer circuit, and a second voltage outputting circuit configured to receive the second voltage at an input terminal and output a third voltage by dividing a driving voltage in accordance with a resistance ratio, wherein the second voltage outputting circuit includes a sub-voltage outputting circuit and a controlling circuit configured to adjust a voltage level of the third voltage through a feedback of the third voltage to the input terminal.