Abstract: The invention includes semiconductor packages having a patterned substrate with openings extending therethrough, conductive circuit traces over the substrate and having portions extending over the openings, a semiconductor die over the circuit traces, and a matrix contacting the circuit traces and also contacting the die. The invention also includes methods of forming semiconductor packages. Such methods can include provision of a construction comprising an electrically conductive layer on a masking material. The layer has a first surface facing the masking material and a second surface in opposing relation to the first surface. The masking material is patterned to form openings extending to the first surface of the layer. The layer is then patterned. Subsequently, an integrated circuit die is provided over the second surface of the layer.

Abstract: The invention includes semiconductor packages having a patterned substrate with openings extending therethrough, conductive circuit traces over the substrate and having portions extending over the openings, a semiconductor die over the circuit traces, and a matrix contacting the circuit traces and also contacting the die. The invention also includes methods of forming semiconductor packages. Such methods can include provision of a construction comprising an electrically conductive layer on a masking material. The layer has a first surface facing the masking material and a second surface in opposing relation to the first surface. The masking material is patterned to form openings extending to the first surface of the layer. The layer is then patterned. Subsequently, an integrated circuit die is provided over the second surface of the layer.

Abstract: The invention includes semiconductor packages having a patterned substrate with openings extending therethrough, conductive circuit traces over the substrate and having portions extending over the openings, a semiconductor die over the circuit traces, and a matrix contacting the circuit traces and also contacting the die. The invention also includes methods of forming semiconductor packages. Such methods can include provision of a construction comprising an electrically conductive layer on a masking material. The layer has a first surface facing the masking material and a second surface in opposing relation to the first surface. The masking material is patterned to form openings extending to the first surface of the layer. The layer is then patterned. Subsequently, an integrated circuit die is provided over the second surface of the layer.

Abstract: The invention includes semiconductor packages having a patterned substrate with openings extending therethrough, conductive circuit traces over the substrate and having portions extending over the openings, a semiconductor die over the circuit traces, and a matrix contacting the circuit traces and also contacting the die. The invention also includes methods of forming semiconductor packages. Such methods can include provision of a construction comprising an electrically conductive layer on a masking material. The layer has a first surface facing the masking material and a second surface in opposing relation to the first surface. The masking material is patterned to form openings extending to the first surface of the layer. The layer is then patterned. Subsequently, an integrated circuit die is provided over the second surface of the layer.

Abstract: The invention includes semiconductor packages having a patterned substrate with openings extending therethrough, conductive circuit traces over the substrate and having portions extending over the openings, a semiconductor die over the circuit traces, and a matrix contacting the circuit traces and also contacting the die. The invention also includes methods of forming semiconductor packages. Such methods can include provision of a construction comprising an electrically conductive layer on a masking material. The layer has a first surface facing the masking material and a second surface in opposing relation to the first surface. The masking material is patterned to form openings extending to the first surface of the layer. The layer is then patterned. Subsequently, an integrated circuit die is provided over the second surface of the layer.

Abstract: The invention encompasses methods of preparing interposers for utilization in semiconductor packages. The invention includes a method in which an interposer substrate having a surface and a conductive layer extending over the surface is provided. Pads are formed on the conductive layer by plating a conductive material on the conductive layer while using the conductive layer as an electrical connection to a power source and without utilizing conductive busses, other than the conductive layer. Subsequent to the formation of the pads, the conductive layer is patterned into circuit traces. Methodology of the present invention can be utilized for, for example, forming board-on-chip constructions.