Abstract: A method for manufacturing a three-dimensional high voltage transistor is disclosed. According to the method, lengths and widths of channels are increased while the reducing transistor forming area on plane, and semiconductor devices are completely separated from each other while restraining parasitic capacitance, latch-up phenomena, and formation of field transistors. The three-dimensional high voltage transistor includes an active area of the three-dimensional high voltage transistor formed in the form of a column on predetermined areas of a Silicon-On-Insulator substrate, source and drain formed in the active areas of the three-dimensional high voltage transistor in the depth direction, a channel area formed between the source and the drain in the depth direction, and a column-shaped gate formed at the side of the channel area on the Silicon-On-Insulator substrate.

Abstract: Disclosed is a rectifier diode device. The rectifier diode device includes a conductive base, a semiconductor chip, a conductive lead and insulation resin. A trench and a post are formed in the conductive base in order to increase a bonding surface between the conductive base and the insulating resin and to lengthen a humidity transfer path for the semiconductor chip. Due to the trench and the post, the bonding surface between the conductive base and the insulating resin increases and the humidity transfer path for the semiconductor chip lengthens, thereby improving heat emission performance of the rectifier diode device. A plurality of prismatic protrusions is formed at an outer peripheral wall of the conductive wire so that coupling force between the conductive wire and an external device is improved. A protrusion ring is provided at a lower surface of the conductive wire so that stress applied to the semiconductor chip is minimized when the rectifier diode device is press-fitted into the external device.