Abstract: A signal synchronizer according to embodiments herein uses a delay register that receives a feedback signal. The delay register has many delay circuits, each of which are adapted to delay the feedback signal at different time intervals. A storage register made up of many binary storage devices receives a reference signal. Each storage device is adapted to store a feedback signal state of a corresponding delay circuit. As the feedback signal is delayed the additional time intervals by the successive delay circuits, it will change states (either from high to low, or low to high) and the different storage devices simultaneously store the feedback signal states of each of the delay circuits, as controlled by the reference signal. The change in feedback signal state between adjacent storage devices records a synchronization separation between the feedback signal and the reference signal. A control device synchronizes the feedback signal based on the synchronization separation as recorded by the storage register.