Abstract: A circuit composed of a circuit board of crystalline elemental silicon slice and circuit components in the form of semiconductor integrated circuits therein which are preferably formed of a Group III-V compound. Signals from each of the integrated circuits are transmitted to other integrated circuits on the board or externally of the board either by conventional printed conductors on the board or by a laser formed in each integrated circuit at each output terminal thereon which transmits light signals along light transmitting members in the silicon board to detectors at the input locations on other ones of the integrated circuits on the board for external to the board. The light signal is transferred from an integrated circuit output to an integrated circuit input or to a device external to the board by means of light transmitting members. These light transmitting members may be light conducting waveguides positioned either on the surface of the board or in grooves formed therein.

Abstract: The disclosure relates to a complex circuit composed of a circuit board which is formed of crystalline elemental silicon in the form of a slice and circuit component in the form of semiconductor integrated circuits thereon which are preferably formed of a Group III-V compound. Signals from each of the integrated circuits are transmitted to other integrated circuits on the board or externally of the board either by conventional printed conductors on the board or, preferably, by means of a laser formed in each integrated circuit at each output terminal thereon which transmits light signals along light conducting members in the silicon board to photo responsive elements at the input locations on other ones of the integrated circuits on the board for external to the board. The light signal is transferred from an integrated circuit output to an integrated circuit input or to a device external to the board by means of light conducting members.

Abstract: A semiconductor circuit apparatus including several semiconductor substrates interconnected by having elevated portions of one substrate contacting the surface of the second substrate where both substrates include at least one electrical circuit. Also included is a method for forming this three dimensional integrated circuit structure by forming the elevated portions of the semiconductor substrate by applying an orientation-dependent etch and then applying an electrically conductive coating to this elevated portion. Electrically conductive bonding pads are formed on the second semiconductor substrate. These pads are selectively positioned relative to the elevated portions formed on the first semiconductor substrate. Contacts between the first and second substrate are formed by forming bonds between the elevated portions on the one substrate and the electrically conductive pads on the second substrate.

Abstract: An intelligent multiprobe tip comprising a mounting member comprised essentially of piezoelectric material wherein, through appropriately locating metalized areas, the characteristics of the piezoelectric material are employed to insulate selected regions from each other while providing an appropriate force-induced output signal responsive to the contact of an attached tip with a movable work piece.

Abstract: A multiprobe tip assembly, and method of making same, for quality control testing of an integrated circuit wafer characterized by the precision control of the assembly in the z-axis. The assembly includes a probe tip mounting support member having at least one electrically conductive path disposed thereon, an electrically conductive probe tip member affixed thereto, and means for electrically coupling the probe tip member to the electrically conductive path.

Abstract: A method for fabricating a semiconductor device and the semiconductor device so fabricated, wherein the method includes the steps of forming a mesa upon one side of a semiconductor surface and then forming a conduction path from the mesa extending through the slice to the opposite side of the semiconductor substrate. Aluminum/silicon alloy droplets are deposited on the first side and form a liquid eutectic which extends to the opposite side by providing a thermal gradient across the slice causing thermomigration of the liquid eutectic. An electrical circuit is then formed on the opposite side and electrically connected to the metal conductor extending through the substrate as formed by the thermomigration of the liquid eutectic. A semiconductor structure is also described that includes an elevated surface upon the first side of a semiconductor substrate and an indentation in the other side, also the combination of two or more such substrates arranged in a stacked configuration.

Abstract: A semiconductor circuit apparatus including several semiconductor substrates interconnected by having elevated portions of one substrate contacting the surface of the second substrate where both substrates include at least one electrical circuit. Also included is a method for forming this three dimensional integrated circuit structure by forming the elevated portions of the semiconductor substrate by applying an orientation-dependent etch and then applying an electrically conductive coating to this elevated portion. Electrically conductive bonding pads are formed on the second semiconductor substrate. These pads are selectively positioned relative to the elevated portions formed on the first semiconductor substrate. Contacts between the first and second substrate are formed by forming bonds between the elevated portions on the one substrate and the electrically conductive pads on the second substrate.

Abstract: An image focal plane array is disclosed including a first substrate having a first surface containing image detection elements that are interconnected to metallized layers on the opposite surface. The first substrate area is located above a second semiconductor substrate containing elevated portions that are metal coated and contacting the metallized portions on the opposite surface of the the first substrate to provide for electrical interconnection with the detection elements on the first substrate. A second structure is also illustrated which includes the image focal point array located on a cold finger and adjacent to the image focal plane array on the same cold finger is a stack of at least two silicon substrates containing support circuitry for the focal plane array. The circuitry on these semiconductor substrate stacks are interconnected by having at least one of the substrates including elevated portions to provide electrical interconnection between the two or more stack substrates.

Abstract: A high density multiprobe including a multiprobe on a semiconductor substrate with contact pads selectively positioned in relation to the contacts of a device to be tested. Each of the selectively positioned contacts on the multiprobe semiconductor substrate include an elevated conductive surface that makes physical and electrical contact with the contacts of the device to be tested. In addition, the elevated conductive surfaces on the multiprobe are conductively connected to interface terminals on the semiconductor substrate to allow test signals to be input and output from the multiprobe device during testing. The multiprobe semiconductor substrate is also capable of containing onboard circuitry including buffers and logic circuitry for processing the test signals to be sent to and received from the device under test. A multiprobe testing device is also disclosed that includes the multiprobe semiconductor substrate with elevated contacts to allow for the testing of a semiconductor device.

Abstract: A method for optically marking selected integrated circuit bars of visual identification. In one embodiment a layer for photosensitive material applied to a portion of all of the bars on a wafer prior to testing. Selected bars are marked by directing a beam of radiant energy at the photosensitive material, which changes opacity and/or color in the irradiated region.

Abstract: A memory circuit including several semiconductor substrates, each containing addressable memory elements, address receiving circuitry for receiving address signals and for providing data from the memory in response to the address signals, control circuitry for receiving control signals and for controlling the reading and writing of the memory elements, and interconnection circuitry including elevated portions of the semiconductor substrate connected to contact paths of the semiconductor substrate located above to provide electrical continuity between the addressable circuits of each semiconductor substrate and electrical continuity between the control circuits of each semiconductor substrate.

Abstract: An improved system and method for sensing and measuring heart beat. A body-mountable instrument is provided having a first sensor for detecting pulsing of a user's blood resulting from the user's heart beat and body movement and generating a first electrical signal indicative thereof and a second sensor for detecting the user's body movement and generating a second electrical signal indicative thereof. The instrument further includes a processor responsive to the first and second electrical signals for determining the period of the second electrical signal and for subtracting a first portion of the first electrical signal occurring during a first time interval from a corresponding portion of the first electrical signal occurring during a second time interval.

Abstract: A four-quadrant multiprobe edge sensor system which comprises a printed circuit board having a plurality of data probes mounted thereon which include four data-detector probes particularly-positioned. The data-detector probes include a support body, and an arm supported by the body and attached thereto in an angular fashion. A probe tip in the form of a needle extends from and is attached to the arm. The probe tip includes a downwardly positioned point for contact with the surface having integrated circuits defined thereon. A force sensitive material is attached to but electrically isolated from the arm and has conductor leads extending therefrom with said force sensitive material comprising a piezoelectric material, for example. The four data-detector probes are located on the printed circuit board such that when being used for testing, the probe tips of the four data-detector probes are placed in each of the four corners of an integrated circuit chip defined on a semiconductor slice.

Abstract: A multiprobe test system is disclosed for testing microcircuits which includes a printed circuit board having a plurality of data-detector probes attached for z-axis control and edge detection. The data-detector probes include a support body, and an arm supported by the body and attached thereto in an angular fashion. A probe tip in the form of a needle extends from and is attached to the arm. The probe tip includes a downwardly positioned point for contact with the surface having integrated circuits defined thereon. A force sensitive material is attached to but electrically isolated from the arm and has conductor leads extending therefrom. The force sensitive material comprises a piezoelectric material, for example.