Abstract: A system for ascertaining identity of a customer based on a single card carried by the customer. The card bears a machine-readable code, which is transmitted to a database at a remote location. The database locates a record associated with the code, which contains one or more account numbers. Associated with each account number is a Personal Identification Number, PIN. (It is possible that all PINs are identical.) The customer selects an account number, and is asked for a PIN. If the PIN given by the customer matches that of the account number, the customer is concluded to be the valid owner of the account, and a transaction is allowed to proceed.

Abstract: A method and system of maintaining coherency for a data block transferred from a main memory to a cache memory. The data transfer is recorded in a tag register in the main memory. An overwrite of the data block is detected by comparing main memory data writes with the recorded transfer. The cache memory is only notified in the event an overwrite is detected. An invalid flag is then set in the cache.

Abstract: A system for establishing connections between processors in a distributed system of processors connected by a multiple multi-drop network. No wires are needed in addition to those already present in an existing network. In such a network connecting n processors, each processor is connected to all others by n identical multi-drop links. Links are assigned to processors on a one-to-one basis and a processor may transmit messages only on its assigned link. Processors may receive messages on any of these links, thereby enabling a processor to communicate with all others. The advantage of such a network over a single multi-drop link is that there is no contention for a shared link since each processor has a unique transmit line. In addition, no central control means is required for the network, as completely distributed control is utilized.

Abstract: In a data processing system including a relatively large, page-formatted memory, memory control functions are distributed over a plurality of microprocessors connected in an array with each microprocessor controlling a respective area of the large memory. Upon overflow of its assigned memory area, a microprocessor may "borrow" free memory space assigned to one of its neighbors in the microprocessor array. Memory control functions with respect to different areas in the memory can effectively be performed in parallel, thus improving the operating efficiency.

Abstract: A circuit-switched local area network relies on a star topology for data transfer. Signalling information is confined to a single common signalling link or channel. Contention on the signalling link or channel is obviated by the use of a contention resolution device which is coupled to all ports for receiving requests to send from the ports and for providing clear to send messages to the requesting ports, in turn. A port desiring communication with another port first raises its request to send and when it receives a clear to send from the contention resolution device, it places the message or call set up information on the signalling link or channel. Once the call or message set up information has been transmitted, the addressing port may de-assert its request to send which will result in the contention resolution device de-asserting the clear to send.

Abstract: A switching system or local area network is non-blocking, transmit-secure and employs a star type topology. A back plane uses n(n-1) bus lines to interconnect n ports. Each port can transmit on any one of n-1 bus lines depending on the identity of the destination port. Likewise, each port can receive from any of n-1 bus lines, depending on the identity of the transmitting port. Signalling as well as data flow on the same bus lines. Each of the ports includes a dedicated microprocessor along with an arbitrator to resolve contention. The ports further have transmit and receive multiplexers coupled between the back plane and an associated work station or information source/sink.

Abstract: A system is shown for connecting a plurality of intelligent terminals through a central non-blocking switch to each other, to a partitioned memory and to one or more service processors to form a local area network.