Abstract: An LCD device is disclosed. The LCD device includes a liquid crystal panel configured to include a bonding portion formed in its one edge, pluralities of gate and data lines arranged on it, and pixel regions defined by the gate and data lines. The bonding portion includes: first metal patterns formed away from each other and on a substrate of the liquid crystal panel; a gate insulation film and a protective layer sequentially formed to cover the first metal patterns; and a second metal pattern formed on the protective layer and electrically connected to the first metal patterns partially exposed by contact holes which are formed by partially etching the gate insulation film and protective layer.

Abstract: The liquid crystal display device includes an output portion which is configured to include an output transistor having a large capacitor component. The output portion includes a top electrode which is configured to include an output transistor having a large capacitor component. As such, the liquid crystal display device can enhance the response speed of liquid crystal.

Abstract: An LCD device is disclosed. The LCD device includes a liquid crystal panel configured to include a bonding portion formed in its one edge, pluralities of gate and data lines arranged on it, and pixel regions defined by the gate and data lines. The bonding portion includes: first metal patterns formed away from each other and on a substrate of the liquid crystal panel; a gate insulation film and a protective layer sequentially formed to cover the first metal patterns; and a second metal pattern formed on the protective layer and electrically connected to the first metal patterns partially exposed by contact holes which are formed by partially etching the gate insulation film and protective layer.

Abstract: A liquid crystal display device is disclosed. The liquid crystal display device includes an output portion which is configured to include an output transistor having a large capacitor component. As such, the liquid crystal display device can enhance the response speed of liquid crystal.

Abstract: A method for manufacturing a three-dimensional high voltage transistor is disclosed. According to the method, lengths and widths of channels are increased while the reducing transistor forming area on plane, and semiconductor devices are completely separated from each other while restraining parasitic capacitance, latch-up phenomena, and formation of field transistors. The three-dimensional high voltage transistor includes an active area of the three-dimensional high voltage transistor formed in the form of a column on predetermined areas of a Silicon-On-Insulator substrate, source and drain formed in the active areas of the three-dimensional high voltage transistor in the depth direction, a channel area formed between the source and the drain in the depth direction, and a column-shaped gate formed at the side of the channel area on the Silicon-On-Insulator substrate.