Patents by Inventor Lei Deng

Lei Deng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12250847
    Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes: a base substrate including a display region and an opening region adjacent to each other; and at least one isolation wall extending along a boundary between the display region and the opening region. Each of the at least one isolation wall includes at least one isolation structure, and each of the at least one isolation structure includes: a first layer on a side of the base substrate; and a second layer on a side of the first layer away from the base substrate; and the orthographic projection of the first layer on the base substrate is within the orthographic projection of the second layer on the base substrate. The isolation wall effectively disconnects the organic light emitting material, prevents moisture from entering the display region, and improves the display quality.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: March 11, 2025
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Deng, Lei Deng, Kangguan Pan, Huimin Cao, Yue He
  • Publication number: 20250072269
    Abstract: Provided are a display panel and a display device. The display panel includes: a via hole penetrating through the display panel; a cutting residual area on the periphery of the via hole and includes a base substrate, and a packaging layer; and at least one annular relief structure between the packaging layer and the base substrate in the cutting residual area. The at least one annular relief structure is sequentially distributed around the via hole. The relief structure includes: a first titanium metal layer, an aluminum metal layer and a second titanium metal layer which are sequentially arranged in a stacked mode.
    Type: Application
    Filed: November 12, 2024
    Publication date: February 27, 2025
    Inventors: Lei DENG, Yue WEI, Xia TANG, Wei DENG, Qian WANG, Junxiu DAI, Yang ZHOU, Xin ZHANG, Yi QU
  • Publication number: 20240431144
    Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate and sub-pixels. The sub-pixel includes a light-emitting element which includes a light-emitting functional layer and a first electrode and a second electrode. The display substrate further includes a defining structure, a first orthographic projection of a surface, close to the base substrate, of the defining structure between adjacent sub-pixels on the base substrate is completely within a second orthographic projection of a surface, away from the base substrate, of the defining structure on the base substrate, a maximum size of the second orthographic projection is greater than that of the first orthographic projection, and the defining structure includes an inorganic nonmetallic material; the light-emitting functional layer is disconnected at an edge of the defining structure, and second electrodes of adjacent sub-pixels are at least partially continuously arranged.
    Type: Application
    Filed: August 30, 2022
    Publication date: December 26, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Fei LIU, Xin JIN, Lei FAN, Liangyun LI, Qinbo REN, Chunfang FAN, Ying LIU, Wei ZHANG, Xiaoliang GUO, Lei DENG, Nuo SHI
  • Publication number: 20240251622
    Abstract: A display apparatus, a display panel, and a manufacturing method thereof, relate to the field of display technology. The display panel includes a substrate (SU), a transistor layer (TL), a wiring layer (SD), a flat layer (PLN), and a light emitting layer (OL). The transistor layer (TL) is disposed on a side of the substrate (SU) and includes a storage capacitor (C) and a transistor. The material of the first type of transistor includes silicon, and material of the second type of transistor includes a metal oxide. The wiring layer (SD) is disposed on a side of the transistor layer (TL) away from the substrate (SU) and connected to the transistor layer (TL) to form a plurality of pixel circuits. The wiring layer (SD) includes a data line (DAL) and a first power supply line (VDL). The flat layer (PLN) covers the wiring layer (SD).
    Type: Application
    Filed: April 25, 2022
    Publication date: July 25, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Lei DENG, Yue WEI, Yanxin SU, Minghui LI, Xu YANG
  • Publication number: 20240188390
    Abstract: A display panel has a display region and a peripheral region. The display panel includes a substrate, a first metal layer disposed on the substrate, a planarization layer disposed on a side of the first metal layer away from the substrate, and a retaining wall structure located in the peripheral region and surrounding the display region. The first metal layer includes a signal line pattern located in the peripheral region. The planarization layer includes an opening in the peripheral region. At least a portion of the retaining wall structure is located in the opening. The signal line pattern is provided with at least one through hole, an orthogonal projection of the at least one through hole on the substrate is located within an orthogonal projection of the opening on the substrate, and is at least located on a side of an orthogonal projection of the retaining wall structure on the substrate.
    Type: Application
    Filed: February 20, 2023
    Publication date: June 6, 2024
    Inventors: Bo ZHANG, Zhiwen CHU, Yi QU, Xinxin WANG, Aoyuan FENG, Hongwei MA, Ying LIU, Xin JIN, Lei FAN, Jianbo YANG, Xiaoliang GUO, Lei DENG, Chunfang FAN, Fei LIU, Liangyun LI, Qinbo REN, Yingchang GAO
  • Publication number: 20240155876
    Abstract: Disclosed are a display substrate and a method for manufacturing same, and a display apparatus.
    Type: Application
    Filed: November 8, 2022
    Publication date: May 9, 2024
    Inventors: Lei DENG, Yue WEI, Guoqiang YANG, Wei CUI, Xu YANG, Tinghua SHANG, Yi ZHANG, Tingliang LIU, Huijuan YANG, Huiyang YU, Wei ZHANG, Xiaoliang GUO
  • Patent number: 11945841
    Abstract: Disclosed are universal influenza based on a truncated influenza hemagglutin (HA) protein lacking a head domain (hrHA). Also disclosed is a composition comprising a nanoparticle coated with a disclosed hrHA polypeptide. Also disclosed is a composition comprising a virus like particle (VLP) expressing on its surface a disclosed hrHA polypeptide.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: April 2, 2024
    Assignee: Gerogia State University Research Foundation, Inc.
    Inventors: Baozhong Wang, Lei Deng
  • Publication number: 20240102029
    Abstract: The present disclosure relates to a two-plasmid system for prime editing in yeast, use thereof, and a method for gene prime editing in yeast. The two-plasmid system includes a first plasmid and a second plasmid. The first plasmid includes a sequence encoding for an epegRNA. The epegRNA is an RNA molecule including a motif at a 3?-terminus of a pegRNA, and the motif having a sequence as set forth in SEQ ID NO. 12. The second plasmid includes a sequence encoding for a fusion protein of a nucleic acid nickase nCas9 fused with a reverse transcriptase M-MLV RT. The two-plasmid expression system can be used in gene editing in yeast.
    Type: Application
    Filed: April 16, 2023
    Publication date: March 28, 2024
    Inventors: Zehua BAO, Xiaoxiao SHI, Weiyu XIE, Lei DENG, Zhenkun CAI
  • Publication number: 20230422588
    Abstract: Provided are a display panel and a display device. The display panel includes: a via hole penetrating through the display panel; a cutting residual area on the periphery of the via hole and includes a base substrate, and a packaging layer: and at least one annular relief structure between the packaging laver and the base substrate in the cutting residual area. The at least one annular relief structure is sequentially distributed around the via hole. At least one relief structure is provided with a surface facing away from the base substrate, and a side face connected to the surface, at least one of the surface and the side face is of a relief shape. The first relief structure is the relief structure with a smallest distance from the center of the via hole.
    Type: Application
    Filed: December 2, 2020
    Publication date: December 28, 2023
    Inventors: Lei DENG, Yue WEI, Xia TANG, Wei DENG, Qian WANG, Junxiu DAI, Yang ZHOU, Xin ZHANG, Yi QU
  • Patent number: 11834778
    Abstract: A multifunctional high-strength composite fabric coating agent, a coating, a method for preparing the same and an application thereof are provided. The fabric coating agent includes a resin, a reinforcing agent with a reactive group, a bifunctional dispersing agent, a leveling agent, a film forming agent, a softening agent, an antibacterial agent, a solvent, and the like. The reinforcing agent is modified such that it has active functional groups of —OH and NH3. The fabric coating agent is not only easy to apply, fast to react and stabilize, but also suitable for a fabric surface of any material. A treated fabric has high tensile-breaking strength, excellent tearing and bursting performance, good waterproof-and-moisture-permeability and antibacterial performance, and high adhesion. It can be repeatedly knife coated, roll coated, calendared, or dipped. The method is not only mature in technology and low in production cost, but also suitable for large-scale application.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: December 5, 2023
    Assignee: Jiangnan University
    Inventors: Dan Zhang, Chanjuan Huang, Lei Deng, Zhu Long
  • Patent number: 11774455
    Abstract: A peptide aptamer for specific recognition of arginine and its application are provided. The sequence of the peptide aptamer is shown in SEQ ID No. 1. The peptide aptamer is modified by a group that improves stability, or by a fluorescent group, an isotope and an electrochemical group that provide a detection signal, or by an affinity ligand and a mercapto. According to the computer-aided molecular docking simulation prediction, the peptide aptamer that can specifically bind to L-arginine is screened, which is verified by an isothermal titration calorimeter. The peptide aptamer has the advantages of good stability, strong binding ability, high specificity and low production cost.
    Type: Grant
    Filed: November 16, 2019
    Date of Patent: October 3, 2023
    Assignee: INSTITUTE OF SUBTROPICAL AGRICULTURE, CHINESE ACADEMY OF SCIENCES
    Inventors: Zemeng Feng, Yumin He, Lei Deng, Zhong Cao, Zhongliang Xiao, Yulong Yin
  • Patent number: 11673192
    Abstract: The invention belongs to the field of amorphous alloys, and more specifically, relates to a method for calibrating the internal temperature field of amorphous alloy prepared by spark plasma sintering. First, the part required for temperature field calibration inside the bulk amorphous alloy sample obtained by spark plasma sintering is cut into a series of small amorphous alloy samples, and the isothermal crystallization treatment is performed to obtain the crystallization time of different parts of the sample. An annealing-isothermal crystallization experiment is performed on the adopted amorphous alloy powder at different annealing temperatures, and the functional relationship between the annealing temperature and the crystallization time is obtained.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: June 13, 2023
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Pan Gong, Huaping Ding, Xinyun Wang, Junsong Jin, Lei Deng, Mao Zhang, Xuefeng Tang
  • Publication number: 20230148280
    Abstract: A driving backplane includes: a substrate; a first conductive layer disposed on the substrate; an insulating layer disposed on a side of the first conductive layer away from the substrate; and a second conductive layer disposed on a side of the insulating layer away from the substrate. The first conductive layer includes a first electrode, the first electrode includes a first sub-electrode and a second sub-electrode surrounding the first sub-electrode, and the second sub-electrode and the first sub-electrode have no gap therebetween. The second conductive layer includes a second electrode. An orthographic projection of the second electrode on the substrate coincides with an orthographic projection of the first sub-electrode on the substrate. The first sub-electrode, the second electrode and a portion of the insulating layer located therebetween constitute a first capacitor.
    Type: Application
    Filed: October 12, 2021
    Publication date: May 11, 2023
    Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lei DENG, Yue WEI, Shiyang XU, Fei LI, Qian WANG
  • Patent number: 11641765
    Abstract: A backplane, a display device and a method of manufacturing a backplane are provided. The backplane includes a base substrate; an inorganic layer on the base substrate, the inorganic layer including a plurality of protrusions; a metal layer covering atop of each protrusion and partial side wall near the top, the metal layer covering adjacent protrusions being disconnected; and a light-emitting layer covering the metal layer and the inorganic layer between the adjacent protrusions, the light-emitting layer being disconnected at regions of the protrusions not covered by the metal layer.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: May 2, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhen Zhang, Xinwei Wu, Kangguan Pan, Lei Deng, Huimin Cao, Fei Li, Wei Huang, Fuwei Zou, Xia Tang, Xijie Peng, Lin Wen, Xudong An, Junjie Zhao, Yue Wei, Yuqing Yang
  • Publication number: 20230038974
    Abstract: The invention belongs to the field of amorphous alloys, and more specifically, relates to a method for calibrating the internal temperature field of amorphous alloy prepared by spark plasma sintering. First, the part required for temperature field calibration inside the bulk amorphous alloy sample obtained by spark plasma sintering is cut into a series of small amorphous alloy samples, and the isothermal crystallization treatment is performed to obtain the crystallization time of different parts of the sample. An annealing-isothermal crystallization experiment is performed on the adopted amorphous alloy powder at different annealing temperatures, and the functional relationship between the annealing temperature and the crystallization time is obtained.
    Type: Application
    Filed: April 6, 2021
    Publication date: February 9, 2023
    Applicant: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Pan GONG, Huaping DING, Xinyun WANG, Junsong JIN, Lei DENG, Mao ZHANG, Xuefeng TANG
  • Patent number: 11551074
    Abstract: The disclosure relates to a self-adaptive leakage value neuron information processing method and system. The method includes: receiving front end pulse neuron output information; reading current pulse neuron information, wherein the current pulse neuron information includes self-adaptive membrane potential leakage information; calculating current pulse neuron output information according to the front end pulse neuron output information and the current pulse neuron information; updating the self-adaptive membrane potential leakage information according to the current pulse neuron output information; outputting the current pulse neuron output information.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: January 10, 2023
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Luping Shi, Jing Pei, Lei Deng, Zhenzhi Wu, Guoqi Li
  • Patent number: 11537879
    Abstract: There are provided a neural network weight discretizing method, system and device, and a computer readable storage medium. The method includes acquiring a weight value range and a number of discrete weight states, the weight value range referring to a range of discrete weight values consisting of a maximum weight value of a current time step and a minimum weight value of the current time step, and the number of discrete weight states referring to the quantity of discrete weight states. The method also includes acquiring a weight state of a previous time step and a weight increment of the current time step and acquiring a state transfer direction by using a directional function according to the weight increment of the current time step. The method also includes acquiring a weight state of the current time step according to the weight state of the previous time step, the weight increment of the current time step, the state transfer direction, the weight value range and the number of discrete weight states.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: December 27, 2022
    Assignee: Tsinghua University
    Inventors: Guoqi Li, Zhenzhi Wu, Jing Pei, Lei Deng
  • Patent number: 11527738
    Abstract: A display substrate and a preparation method thereof, and a display device are provided. The preparation method includes: forming a display region and a non-display region including an opening region; forming a first barrier wall between the display region and the opening region, in which the first barrier wall surrounds the opening region and includes a first metal layer structure, and a recess is formed on at least one side surface, surrounding the opening region, of the first metal layer structure; and after the first barrier wall is formed, forming a conductive layer pattern in the display region and on the first barrier wall. The forming the conductive layer pattern includes: forming a conductive material layer in the display region and on the first barrier wall, the conductive material layer being disconnected at the first barrier wall; and patterning the conductive material layer to form the conductive layer pattern.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: December 13, 2022
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Zhen Zhang, Yuqing Yang, Yue Wei, Yiyang Zhang, Lei Deng
  • Patent number: 11499215
    Abstract: The invention provides a method and a product for manufacturing a titanium alloy dual-structure turbine disk based on partial hydrogenation, which includes the following steps: coating a glass coating on the partial surface of a titanium alloy billet where hydrogen-blocking is required, and sintering the titanium alloy billet coated with the glass coating; performing hydrogenation treatment on the titanium alloy billet, such that the hydrogen concentration at the hydrogenation-required portion reaches the predetermined level; removing the glass coating from the titanium alloy billet; preheating the titanium alloy billet, and then performing high temperature die forging in the forging dies; performing vacuum dehydrogenation treatment on the forged turbine disk to remove hydrogen element inside the forging, so that the hydrogen content is 0.015 wt. % or less.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: November 15, 2022
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Lei Deng, Xinyun Wang, Junsong Jin, Pan Gong, Wenbin Li
  • Patent number: 11465186
    Abstract: A microwave plasma gasification and recycle integrated system for domestic garbage. The system is fixed in a garbage truck compartment with a garbage inlet, and includes a closed chain-plate type feeder, a shredding machine, and a closed magnetic separator which are connected in sequence. The magnetic separator is further separately connected to a microwave plasma gasification furnace and a metal recycle tank. The microwave plasma gasification furnace is further separately connected to a stink processor, a plastic residue recycle tank, an integrated sewage treatment device, and a residue smashing machine. The stink processor is connected to a gas recycle tank. Both the residue smashing machine and the integrated sewage treatment device are connected to an aerobic fermentation tank. The aerobic fermentation tank is connected to a decomposed material recycle tank by means of a decomposed material forming and screening machine.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: October 11, 2022
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Guixin Zhang, Cheng Liu, Hong Xie, Lei Deng