Abstract: A cell-free protein synthesis method includes the following steps: (i) providing a multi-well plate, the multi-well plate includes a cover plate and a base provided with a plurality of wells. Each well is formed by one or more side walls, a bottom II and an opening, and the cover plate matches the opening; (ii) providing fluid to some of the wells; (iii) adding a biochemical factor and one or more of a template DNA, a template RNA; an additive, and a reaction cofactor into the fluid; or (iv) adding one or more of the template DNA, the template RNA, the additive, and the reaction cofactor to the fluid; (v) placing the cover plate on a top of the base to seal the openings of the wells; and (vi) subjecting the multi-well plate to incubation for a period of time.

Abstract: A method for a fluorometric assay in a cell-free protein synthesis environment includes providing a multi-well plate. The multi-well plate includes a cover plate and a base provided with a plurality of wells. Each well is formed by one or more side walls, a bottom II and an opening. The cover plate matches the opening. A volume of a reaction cavity of each well is less than 20 ?L. Some of the wells in the plurality of wells are in fluid communication with each other. Fluid is provided to some of the wells. The cover plate is placed on a top of the base, and the fluid is in contact with the bottom II of each well and the cover plate, and the multi-well plate is incubated.

Abstract: A high voltage tolerant transceiver operating at a low voltage is provided, including two input/output pads to receive a receive signal and transmit a transmit signal; a transmitter block to transmit the transmit signal; a receiver block to receive the receive signal and provide an amplified signal; at least one of the transmitter block and the receiver block further comprising at least two NMOS transistors having their gate coupled to a low power supply to receive the low voltage, their substrate coupled to ground, and their source coupled to the input/output pad. Also provided is a circuit to isolate the output of a transmitter from high voltages, including a first transistor and a second transistor. Also provided is a substrate isolating circuit, including a first transistor, a second transistor, and a third transistor so that the substrate voltage is isolated from a high voltage in the pads.

Abstract: A high voltage tolerant transceiver operating at a low voltage is provided, including two input/output pads to receive a receive signal and transmit a transmit signal; a transmitter block to transmit the transmit signal; a receiver block to receive the receive signal and provide an amplified signal; at least one of the transmitter block and the receiver block further comprising at least two NMOS transistors having their gate coupled to a low power supply to receive the low voltage, their substrate coupled to ground, and their source coupled to the input/output pad. Also provided is a circuit to isolate the output of a transmitter from high voltages, including a first transistor and a second transistor. Also provided is a substrate isolating circuit, including a first transistor, a second transistor, and a third transistor so that the substrate voltage is isolated from a high voltage in the pads.