Patents by Inventor Lei Ping Lai

Lei Ping Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6224472
    Abstract: Methods and apparatus for chemical mechanical polishing of substrates, such as semiconductor wafers, which employ retaining rings to hold a substrate in place during the polishing process. The retaining rings have surface characteristics that may be used to improve polishing uniformity, especially at a wafer periphery, and/or to improve removal rate of a chemical mechanical polishing (“CMP”) system. The surface characteristics may be recesses and/or protrusions on the pad-facing surface of a CMP retaining ring, which during polishing contact and act to flatten a CMP polishing pad beneath the substrate. Near the edge the surface characteristics may also condition the surface of a polishing pad during polishing and may be further configured to improve slurry transport.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: May 1, 2001
    Assignee: Samsung Austin Semiconductor, L.P.
    Inventors: Lei Ping Lai, Joshua L. Tucker, Randall J. Lujan
  • Patent number: 5961373
    Abstract: A process for conditioning a polishing pad has been developed that incorporates in-situ conditioning where the conditioning is performed while the substrate (27, 40) is on the polishing pad (22) but terminates before the polishing of the substrate (27, 40) is completed. In one embodiment, ex-situ conditioning of the polishing pad (22) is used on the polishing pad between substrates (27, 40). The process has benefits of both in-situ and ex-situ conditioning.
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: October 5, 1999
    Assignee: Motorola, Inc.
    Inventors: Lei Ping Lai, Sung C. Kim
  • Patent number: 5899745
    Abstract: A chemical mechanical polishing (CMP) method utilizes a polishing pad (21) and an under pad (20). The under pad (20) has an edge portion (24) and a central portion (22). The central portion (22) has either a shore D hardness less than a shore D hardness of the portion (24), greater slurry absorption than the edge portion (24), or more compressibility than the edge portion (24). This composite material under pad (20) will improve polishing uniformity of a semiconductor wafer (39). In addition, the use of the polishing pads (20 and 21) allows for greater final wafer profile control than was previously available in the art (FIGS. 4-6).
    Type: Grant
    Filed: July 3, 1997
    Date of Patent: May 4, 1999
    Assignee: Motorola, Inc.
    Inventors: Sung C. Kim, Lei Ping Lai, Rajeev Bajaj, Adam Manzonie