Patents by Inventor Lei Yi
Lei Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250122919Abstract: A spindle device includes a shaft housing, a spindle, a bearing liner, a damping adjustment piston and an actuating assembly. The spindle is disposed through the shaft housing. A bearing component surrounds a shaft. The bearing liner is sleeved on the bearing component and has a liner conical surface facing away from the bearing component. The liner conical surface is non-parallel to an axial direction. A damping chamber is formed between the shaft housing and the bearing liner to be filled with a damping fluid. The damping adjustment piston is slidably located within the damping chamber and has a piston conical surface facing the liner conical surface. The piston conical surface is non-parallel to the axial direction. The actuating assembly is to drive the damping adjustment piston to move relative to the bearing liner to adjust a gap formed between the piston conical surface and the liner conical surface.Type: ApplicationFiled: January 4, 2024Publication date: April 17, 2025Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Lei-Yi CHEN, Shao-Yu HSU
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Publication number: 20250055686Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. Three elliptic curve cryptographic instructions are proposed in the instruction set architecture for key exchange between an initiator and a responder. The initiator device executes the first elliptic curve cryptographic instruction to generate a key pair (rA, RA). In addition to considering the first temporary public key RA, the responder device further takes the second temporary public key RB into consideration when executing the second elliptic curve cryptographic instruction to generate the responder-generated shared key KB. Based on the temporary private key rA, and the temporary public keys RA and RB, the initiator device executes the third elliptic curve cryptographic instruction to generate the initiator-generated shared key KA.Type: ApplicationFiled: October 18, 2024Publication date: February 13, 2025Inventors: Yanting LI, Zhenhua HUANG, Yingbing GUAN, Yun SHEN, Lei YI, Shuang YANG
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Patent number: 12155763Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. Three elliptic curve cryptographic instructions are proposed in the instruction set architecture for key exchange between an initiator and a responder. The initiator device executes the first elliptic curve cryptographic instruction to generate a key pair (rA, RA). In addition to considering the first temporary public key RA, the responder device further takes the second temporary public key RB into consideration when executing the second elliptic curve cryptographic instruction to generate the responder-generated shared key KB. Based on the temporary private key rA, and the temporary public keys RA and RB, the initiator device executes the third elliptic curve cryptographic instruction to generate the initiator-generated shared key KA.Type: GrantFiled: June 10, 2022Date of Patent: November 26, 2024Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.Inventors: Yanting Li, Zhenhua Huang, Yingbing Guan, Yun Shen, Lei Yi, Shuang Yang
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Patent number: 12149619Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. The processor has a first register, storing a private key pointer pointing to a private key. In response to a single elliptic curve cryptographic instruction of an instruction set architecture, the processor reads a ciphertext input from a first storage space within a system memory, performing a decryption procedure using the elliptic curve cryptographic algorithm on the ciphertext input based on the private key obtained by referring to the first register to decrypt the ciphertext input and generate a plaintext output, and programming the plaintext output into a second storage space within the system memory.Type: GrantFiled: June 10, 2022Date of Patent: November 19, 2024Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.Inventors: Yanting Li, Zhenhua Huang, Yingbing Guan, Yun Shen, Lei Yi, Shuang Yang
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Patent number: 12149620Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. The processor has a first register storing a Hash value pointer, a second register storing a public key pointer, a third register storing a signature pointer, and a fourth register for storage of a verified result. In response to a first elliptic curve cryptographic instruction of an instruction set architecture, the processor reads the Hash value of the data by referring to the first register, obtains the public key by referring to the second register, obtains the digital signature to be verified by referring to the third register, performs a signature verification procedure using the elliptic curve cryptographic algorithm on the Hash value based on the public key and the digital signature to be verified to generate the verified result, and programs the verified result into the fourth register.Type: GrantFiled: June 10, 2022Date of Patent: November 19, 2024Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.Inventors: Yanting Li, Zhenhua Huang, Yingbing Guan, Yun Shen, Lei Yi, Shuang Yang
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Patent number: 12086065Abstract: A computing system with a first instruction of an instruction set architecture (ISA) for direct invalidation, without writing back, in a hierarchical cache structure based on one single designated key identification code, and a second instruction of ISA for direct invalidation, without writing back, in the hierarchical cache structure based on a plurality of designated key identification codes is shown. A decoder transforms the first or second instruction into at least one microinstruction. Based on the at least one microinstruction, one direct invalidation request is provided corresponding to each designated key identification code, to be passed to the hierarchical cache structure through a memory ordering buffer. For each direct invalidation request, the cache line write-back and invalidation regarding a designated key identification code is performed on a last-level cache first, and then is performed on the in-core cache modules.Type: GrantFiled: October 14, 2022Date of Patent: September 10, 2024Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.Inventors: Weilin Wang, Yingbing Guan, Lei Yi
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Patent number: 12020034Abstract: An instruction execution method for a microprocessor is provided. The microprocessor includes a model specific register (MSR). And, the instruction execution method includes the following steps. A target instruction is received using an instruction cache. The target instruction is decoded using an instruction translator to determine whether the target instruction is a specific instruction is a specific instruction. When the target instruction is the specific instruction, a model specific register index of the target instruction is obtained to directly read or write the model specific register.Type: GrantFiled: November 4, 2022Date of Patent: June 25, 2024Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.Inventors: Weilin Wang, Yingbing Guan, Long Cheng, Lei Yi
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Patent number: 12014181Abstract: An instruction configuration and execution method includes the following steps. A target instruction is received through an instruction cache. The target instruction is decoded by an instruction translator. It is determined whether the target instruction has the authority to read or write the model specific register in an unprivileged state. It is determined whether the model specific register index of the specific instruction corresponds to a specific model specific register, so as to order the microprocessor to perform an instruction serialization operation.Type: GrantFiled: November 4, 2022Date of Patent: June 18, 2024Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.Inventors: Weilin Wang, Yingbing Guan, Lei Yi, Long Cheng
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Patent number: 11971821Abstract: A computing system with a first instruction of an instruction set architecture (ISA) for write-back and invalidation in a hierarchical cache structure based on one single designated key identification code, and a second instruction of ISA for write-back and invalidation in the hierarchical cache structure based on a plurality of designated key identification codes is shown. A decoder transforms the first or second instruction into at least one microinstruction. Based on the at least one microinstruction, one write-back and invalidation request is provided corresponding to each designated key identification code, to be passed to the hierarchical cache structure through a memory ordering buffer. For each write-back and invalidation request, the cache line write-back and invalidation regarding a designated key identification code is performed on a last-level cache first, and then is performed on the in-core cache modules.Type: GrantFiled: October 14, 2022Date of Patent: April 30, 2024Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.Inventors: Weilin Wang, Yingbing Guan, Lei Yi
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Publication number: 20230212180Abstract: The present invention belongs to the field of pharmaceutical chemistry, and relates to a substituted pyrazine compound, a pharmaceutical composition comprising same, and the use thereof. In particular, the present invention relates to a compound with the structure of formula (I), which exhibits a good SHP2 inhibiting activity, and can act as an efficient SHP2 inhibitor for preventing and/or treating SHP2-related diseases.Type: ApplicationFiled: June 11, 2021Publication date: July 6, 2023Inventors: Lei Yi, Qiang Tian, Shoujun Chen, Liqiang Song, Taijin Wang, Qian Liu, Yong Ge, Yu Yang, Huiping Chen, Hongmei Song, Jingyi Wang
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Patent number: 11682153Abstract: A system and a method for obtaining a photo-realistic video from a text. The method includes: providing the text and an image of a talking person; synthesizing a speech audio from the text; extracting an acoustic feature from the speech audio by an acoustic feature extractor; and generating the photo-realistic video from the acoustic feature and the image by a video generation neural network. The video generating neural network is pre-trained by: providing a training video and a training image; extracting a training acoustic feature from training audio of the training video by the acoustic feature extractor; generating video frames from the training image and the training acoustic feature by the video generation neural network; and comparing the generated video frames with ground truth video frames using generative adversarial network (GAN). The ground truth video frames correspond to the training video frames.Type: GrantFiled: September 12, 2020Date of Patent: June 20, 2023Assignees: JINGDONG DIGITS TECHNOLOGY HOLDING CO., LTD., JD FINANCE AMERICA CORPORATIONInventors: Chao Pan, Wenbo Liu, Lei Yi
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Publication number: 20230080856Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. Three elliptic curve cryptographic instructions are proposed in the instruction set architecture for key exchange between an initiator and a responder. The initiator device executes the first elliptic curve cryptographic instruction to generate a key pair (rA, RA). In addition to considering the first temporary public key RA, the responder device further takes the second temporary public key RB into consideration when executing the second elliptic curve cryptographic instruction to generate the responder-generated shared key KB. Based on the temporary private key rA, and the temporary public keys RA and RB, the initiator device executes the third elliptic curve cryptographic instruction to generate the initiator-generated shared key KA.Type: ApplicationFiled: June 10, 2022Publication date: March 16, 2023Inventors: Yanting LI, Zhenhua HUANG, Yingbing GUAN, Yun SHEN, Lei YI, Shuang YANG
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Publication number: 20230083411Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. The processor has a first register, storing a public key pointer pointing to a public key. In response to a single elliptic curve cryptographic instruction of an instruction set architecture, the processor reads a plaintext input from a first storage space within a system memory, performing an encryption procedure using the elliptic curve cryptographic algorithm on the plaintext input based on the public key obtained by referring to the first register to encrypt the plaintext input and to generate a ciphertext output, and programming the ciphertext output into a second storage space within the system memory.Type: ApplicationFiled: June 10, 2022Publication date: March 16, 2023Inventors: Yanting LI, Zhenhua HUANG, Yingbing GUAN, Yun SHEN, Lei YI, Shuang YANG
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Publication number: 20230085569Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. The processor has first register storing a Hash value pointer, and a second register, storing a private key pointer. In response to a first elliptic curve cryptographic instruction of an instruction set architecture, the processor reads a first storage space within a system memory by referring to the first register to get a Hash value of the data to be signed, reads a private key by referring to the second register, performs a signature procedure using the elliptic curve cryptographic algorithm on the Hash value based on the private key to generate a digital signature, and programs the digital signature into a second storage space within the system memory.Type: ApplicationFiled: June 10, 2022Publication date: March 16, 2023Inventors: Yanting LI, Zhenhua HUANG, Yingbing GUAN, Yun SHEN, Lei YI, Shuang YANG
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Publication number: 20230078830Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. The processor has a first register, storing a private key pointer pointing to a private key. In response to a single elliptic curve cryptographic instruction of an instruction set architecture, the processor reads a ciphertext input from a first storage space within a system memory, performing a decryption procedure using the elliptic curve cryptographic algorithm on the ciphertext input based on the private key obtained by referring to the first register to decrypt the ciphertext input and generate a plaintext output, and programming the plaintext output into a second storage space within the system memory.Type: ApplicationFiled: June 10, 2022Publication date: March 16, 2023Inventors: Yanting LI, Zhenhua HUANG, Yingbing GUAN, Yun SHEN, Lei YI, Shuang YANG
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Publication number: 20230069234Abstract: A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. The processor has a first register storing a Hash value pointer, a second register storing a public key pointer, a third register storing a signature pointer, and a fourth register for storage of a verified result. In response to a first elliptic curve cryptographic instruction of an instruction set architecture, the processor reads the Hash value of the data by referring to the first register, obtains the public key by referring to the second register, obtains the digital signature to be verified by referring to the third register, performs a signature verification procedure using the elliptic curve cryptographic algorithm on the Hash value based on the public key and the digital signature to be verified to generate the verified result, and programs the verified result into the fourth register.Type: ApplicationFiled: June 10, 2022Publication date: March 2, 2023Inventors: Yanting LI, Zhenhua HUANG, Yingbing GUAN, Yun SHEN, Lei YI, Shuang YANG
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Patent number: 11391357Abstract: An adjustment device configured to move first bevel gear and second bevel gear that are disposed on base and are meshed with each other. Adjustment device includes first adjustment assembly, and second adjustment assembly. First adjustment assembly includes first fluid-driven power source, first brake component and first displacement sensor. First fluid-driven power source includes first cylinder housing and first piston. First cylinder housing is configured to be disposed on base. First piston is movably disposed on first cylinder housing. First bevel gear is configured to be disposed on first piston. First piston is configured to move first bevel gear along first axial direction. First brake component is configured to be disposed on base and configured to stop or release first piston. First displacement sensor is disposed on first cylinder housing and configured to generate displacement data related to first piston.Type: GrantFiled: October 17, 2019Date of Patent: July 19, 2022Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventor: Lei-Yi Chen
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Publication number: 20220084273Abstract: A system and a method for obtaining a photo-realistic video from a text. The method includes: providing the text and an image of a talking person; synthesizing a speech audio from the text; extracting an acoustic feature from the speech audio by an acoustic feature extractor; and generating the photo-realistic video from the acoustic feature and the image by a video generation neural network. The video generating neural network is pre-trained by: providing a training video and a training image; extracting a training acoustic feature from training audio of the training video by the acoustic feature extractor; generating video frames from the training image and the training acoustic feature by the video generation neural network; and comparing the generated video frames with ground truth video frames using generative adversarial network (GAN). The ground truth video frames correspond to the training video frames.Type: ApplicationFiled: September 12, 2020Publication date: March 17, 2022Inventors: Chao Pan, Wenbo Liu, Lei Yi
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Patent number: 11244548Abstract: A method and a system for self-checkout. The system includes a scanner, an imaging device, and a computing device. The computing device is configured to: initiate a self-checkout event; instruct the imaging device to capture video frames of a region of interest (ROI); track the product; record scanning status and location status of the product; in response to receive a scanning signal from the scanner, record scanning status of the product as scanned; calculate a shoplifting risk score based on a number of the product having the scanning status of unscanned and disappears from the table region or ROI; and provide a shoplifting warning when the shoplifting score is large.Type: GrantFiled: March 3, 2020Date of Patent: February 8, 2022Assignees: Beijing Jingdong Shangke Information Technology Co., Ltd., JD.com American Technologies CorporationInventors: Longyin Wen, Yue Zhang, Xinyao Wang, Lei Yi, Liefeng Bo
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Patent number: D977368Type: GrantFiled: November 25, 2020Date of Patent: February 7, 2023Assignees: BYD COMPANY LIMITED, SHENZHEN BUS GROUP CO., LTD.Inventors: Yubo Lian, Wang Peng, Wolfgang Josef Egger, Juan Manuel Lopez Abad, Wenquan Tang, Xinghua Zheng, Yuncheng Zhang, Lei Yi, Ke Wang