Patents by Inventor Lei Zhuang

Lei Zhuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240116853
    Abstract: 2-hydroxy-5-[2-(4-(trifluoromethylphenyl)ethylamino)]benzoic acid crystal forms and a preparation method therefor are proposed. Crystal form I is a monoclinic crystal system, which has a Pc space group and can be obtained by slow cooling, evaporating the solvent at a constant temperature, evaporating the solvent at an increased temperature, or adding an anti-solvent. Crystal form II is a triclinic crystal system, which has a P1 space group and can be obtained by rapid cooling or freeze-drying. According to the method, the process is simple, costs are low, and the yield exceeds 90%; and the crystal forms of the crystal forms I and II have high purity, the crystal shapes thereof are intact, and have excellent fluidity, facilitating preparation, particularly the preparation of a pharmaceutical preparation for preventing and/or treating degenerative diseases of the central nervous system. Furthermore, the two crystal forms have a better apparent solubility than that of raw materials.
    Type: Application
    Filed: December 6, 2021
    Publication date: April 11, 2024
    Inventors: Xinliang XU, Guoqing ZHANG, Chenghan ZHUANG, Lei WANG, Byoung Joo GWAG, Chun San AHN, Jing Yu JIN
  • Publication number: 20240121174
    Abstract: The technology of this application relates to an information processing method, apparatus, and system. The method includes a controller determining network slice information corresponding to a first network device. The controller sends a border gateway protocol (BGP) packet to the first network device, where the BGP packet includes the network slice information, and the network slice information is used by the first network device to configure a network slice. According to the technical solution provided in this application, efficiency of delivering network slice information can be improved.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 11, 2024
    Inventors: Zhibo HU, Lei BAO, Jie DONG, Guoqi XU, Zhaoyang YAN, Shunwan ZHUANG
  • Publication number: 20240067036
    Abstract: Disclosed is a charging station capable of realizing mutual capacity aid, which comprises a plurality of charging units, a power bus and a mutual capacity aid bus. Each charging unit is powered by the power bus, and each charging unit provides mutual aid capacity for another charging unit through the mutual capacity aid bus or receives mutual aid capacity from other charging units through the mutual capacity aid bus. The charging station can realize rapid charging of electric vehicles, and can also realize mutual capacity aid.
    Type: Application
    Filed: June 4, 2021
    Publication date: February 29, 2024
    Applicants: JIANGSU ELECTRIC POWER RESEARCH INSTITUTE CO., LTD., STATE GRID JIANGSU ELECTRIC POWER CO., LTD. RESEARCH INSTITUTE
    Inventors: Tiankui SUN, Yubo YUAN, Mingming SHI, Xin FANG, Jinggang YANG, Shuyi ZHUANG, Xiaodong YUAN, Chenyu ZHANG, Lei GAO, Peng LI, Yaojia MA, Shu CHEN, Jing CHEN, Qun LI, Jian LIU
  • Patent number: 11905921
    Abstract: A main beam for wind turbine blade, comprising: one or more carbon fiber pultruded bodies, wherein, each carbon fiber pultruded body comprising one or more carbon fiber pultruded sheets, the carbon fiber pultruded sheets are stacked along the thickness direction and are formed by curing a first infusion material, wherein a glass fiber infusion material is arranged between every two carbon fiber pultruded sheets; one or more inlays, which are arranged adjacent to the carbon fiber pultruded body in a direction perpendicular to the thickness direction of the main beam; one or more overlays, which cover the carbon fiber pultruded bodies and/or the inlays on both sides in the thickness direction of the main beam; and a second infusion material, which impregnates carbon fiber pultruded bodies, the inlays and the overlays.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: February 20, 2024
    Assignee: Envision Energy CO., LTD
    Inventors: Yuan Liang, Lars Overgaard, Jianxu Sun, Lei Zhuang
  • Publication number: 20230322499
    Abstract: A device and a method for separating materials. The device includes a material receiving plate arranged to receive materials to be separated, a first pair of supporting members coupled to opposite sides of the material receiving plate via respective pendulum rods, and a second pair of supporting members coupled to the opposite sides of the material receiving plate via respective pendulum rods and spaced apart from the first pair of supporting members. The device also includes a driving mechanism and a transmission mechanism.
    Type: Application
    Filed: August 24, 2020
    Publication date: October 12, 2023
    Inventors: Haoteng Lei, Lei Zhuang, Jianwei Liu, Dilong Yu
  • Publication number: 20230074942
    Abstract: A main beam for wind turbine blade, comprising: one or more carbon fiber pultruded bodies, wherein, each carbon fiber pultruded body comprising one or more carbon fiber pultruded sheets, the carbon fiber pultruded sheets are stacked along the thickness direction and are formed by curing a first infusion material, wherein a glass fiber infusion material is arranged between every two carbon fiber pultruded sheets; one or more inlays, which are arranged adjacent to the carbon fiber pultruded body in a direction perpendicular to the thickness direction of the main beam; one or more overlays, which cover the carbon fiber pultruded bodies and/or the inlays on both sides in the thickness direction of the main beam; and a second infusion material, which impregnates carbon fiber pultruded bodies, the inlays and the overlays.
    Type: Application
    Filed: February 18, 2020
    Publication date: March 9, 2023
    Applicant: Envision Energy CO.,LTD
    Inventors: Yuan LIANG, Lars OVERGAARD, Jianxu SUN, Lei ZHUANG
  • Patent number: 11035712
    Abstract: The present application discloses a metering system for calculating a real-time profit or loss of a gas station, including a metering module, a level gauge of the oil tank, and a communication management machine with a built-in data processing module; the metering module and the level gauge are respectively communicated with the communication management machine; the oil tank, an oil pipeline of the oil tank and an oil inlet of the fuel dispenser are respectively provided with a sensor array module for collecting density data of the oil therein; the sensor array module includes a plurality of oil density sensors; the sensor array modules are communicated with the communication management machine; the built-in data processing module receives and processes data from the metering module, the level gauge and the sensor array modules respectively.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: June 15, 2021
    Assignee: Jiangyin Furen High-Tech Co., Ltd.
    Inventors: Junwei Yuan, Dongcheng Xu, Xiaodong Yin, Yang Fan, Lei Zhuang, Wenqing Wu
  • Publication number: 20200387983
    Abstract: The present application discloses a metering system for calculating a real-time profit or loss of a gas station, including a metering module, a level gauge of the oil tank, and a communication management machine with a built-in data processing module; the metering module and the level gauge are respectively communicated with the communication management machine; the oil tank, an oil pipeline of the oil tank and an oil inlet of the fuel dispenser are respectively provided with a sensor array module for collecting density data of the oil therein; the sensor array module includes a plurality of oil density sensors; the sensor array modules are communicated with the communication management machine; the built-in data processing module receives and processes data from the metering module, the level gauge and the sensor array modules respectively.
    Type: Application
    Filed: April 17, 2020
    Publication date: December 10, 2020
    Inventors: Junwei YUAN, Dongcheng XU, Xiaodong YIN, Yang FAN, Lei ZHUANG, Wenqing WU
  • Patent number: 10768521
    Abstract: An extreme ultraviolet (EUV) mask including an absorber structure is disclosed. The absorber structure may include at least one slanted and/or concave sidewall. The absorber structure may include a sidewall including a step. A method of forming an absorber for an EUV mask is disclosed. The method may include etching an absorber layer using a mask to form an absorber structure having a sidewall wherein an outer edge of the top surface of the sidewall is closer to a central vertical axis of the absorber structure than an outer edge of the bottom surface of the sidewall. The method may include performing additional etching steps to form a step along the sidewall of the absorber structure. The etching may include combinations of anisotropic etching in different directions, and/or isotropic etching. The method may include etching an absorber layer including multiple absorber layers having different material properties on the ML reflector.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: September 8, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Amr Y. Abdo, Lei Zhuang, Jed H. Rankin
  • Patent number: 10366996
    Abstract: Fabrication method for a semiconductor memory device and structure are provided, which includes: providing at least two mask layers over a pair of fin structures extended above a substrate, wherein a first mask layer of the at least two mask layers is orthogonal to a second mask layer of the at least two mask layers; and patterning the pair of fin structures to define a pass-gate transistor, wherein the first mask layer facilitates removing of a portion of a first fin structure of the pair of fin structures to define a first pass-gate fin portion of the pass-gate transistor, and the second mask layer protects a second fin structure of the pair of fin structures to define a second pass-gate fin portion of the pass-gate transistor.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: July 30, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Robert C. Wong, Lei Zhuang, Ananthan Raghunathan
  • Publication number: 20190227427
    Abstract: An extreme ultraviolet (EUV) mask including an absorber structure is disclosed. The absorber structure may include at least one slanted and/or concave sidewall. The absorber structure may include a sidewall including a step. A method of forming an absorber for an EUV mask is disclosed. The method may include etching an absorber layer using a mask to form an absorber structure having a sidewall wherein an outer edge of the top surface of the sidewall is closer to a central vertical axis of the absorber structure than an outer edge of the bottom surface of the sidewall. The method may include performing additional etching steps to form a step along the sidewall of the absorber structure. The etching may include combinations of anisotropic etching in different directions, and/or isotropic etching. The method may include etching an absorber layer including multiple absorber layers having different material properties on the ML reflector.
    Type: Application
    Filed: January 22, 2018
    Publication date: July 25, 2019
    Inventors: Amr Y. Abdo, Lei Zhuang, Jed H. Rankin
  • Patent number: 10217696
    Abstract: A first photoresist layer is patterned with a first pattern that includes an opening in a region between areas of two adjacent via holes to be formed. The opening in the first photoresist is transferred into a template layer to form a line trench therein. The lateral dimension of the trench is reduced by depositing a contiguous spacer layer that does not fill the trench completely. An etch-resistant material layer is conformally deposited and fills the trench, and is subsequently recessed to form an etch-resistant material portion filling the trench. A second photoresist layer is applied and patterned with a second pattern, which includes an opening that includes areas of two via holes and an area therebetween. A composite pattern of an intersection of the second pattern and the complement of the pattern of the etch-resistant material portion is transferred through the template layer.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: February 26, 2019
    Assignee: International Business Machines Corporation
    Inventors: Chiahsun Tseng, Jin Liu, Lei Zhuang
  • Patent number: 9941191
    Abstract: A first photoresist layer is patterned with a first pattern that includes an opening in a region between areas of two adjacent via holes to be formed. The opening in the first photoresist is transferred into a template layer to form a line trench therein. The lateral dimension of the trench is reduced by depositing a contiguous spacer layer that does not fill the trench completely. An etch-resistant material layer is conformally deposited and fills the trench, and is subsequently recessed to form an etch-resistant material portion filling the trench. A second photoresist layer is applied and patterned with a second pattern, which includes an opening that includes areas of two via holes and an area therebetween. A composite pattern of an intersection of the second pattern and the complement of the pattern of the etch-resistant material portion is transferred through the template layer.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: April 10, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chiahsun Tseng, Jin Liu, Lei Zhuang
  • Publication number: 20180068929
    Abstract: A first photoresist layer is patterned with a first pattern that includes an opening in a region between areas of two adjacent via holes to be formed. The opening in the first photoresist is transferred into a template layer to form a line trench therein. The lateral dimension of the trench is reduced by depositing a contiguous spacer layer that does not fill the trench completely. An etch-resistant material layer is conformally deposited and fills the trench, and is subsequently recessed to form an etch-resistant material portion filling the trench. A second photoresist layer is applied and patterned with a second pattern, which includes an opening that includes areas of two via holes and an area therebetween. A composite pattern of an intersection of the second pattern and the complement of the pattern of the etch-resistant material portion is transferred through the template layer.
    Type: Application
    Filed: November 13, 2017
    Publication date: March 8, 2018
    Inventors: Chiahsun Tseng, Jin Liu, Lei Zhuang
  • Patent number: 9899183
    Abstract: Various embodiments include measurement structures and methods for measuring integrated circuit (IC) images. In some cases, a measurement structure for use in measuring an image of an IC, includes: a first section having a positive shift spacing pattern; a second section, on an opposite side of the measurement structure, having a negative shift spacing pattern; and a third section having a reference spacing pattern for calibrating a measurement from at least one of the first section or the second section.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: February 20, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Lei Zhuang, Timothy A. Brunner
  • Publication number: 20180033590
    Abstract: Various embodiments include measurement structures and methods for measuring integrated circuit (IC) images. In some cases, a measurement structure for use in measuring an image of an IC, includes: a first section having a positive shift spacing pattern; a second section, on an opposite side of the measurement structure, having a negative shift spacing pattern; and a third section having a reference spacing pattern for calibrating a measurement from at least one of the first section or the second section.
    Type: Application
    Filed: July 28, 2016
    Publication date: February 1, 2018
    Inventors: Lei Zhuang, Timothy A. Brunner
  • Publication number: 20180012895
    Abstract: Fabrication method for a semiconductor memory device and structure are provided, which includes: providing at least two mask layers over a pair of fin structures extended above a substrate, wherein a first mask layer of the at least two mask layers is orthogonal to a second mask layer of the at least two mask layers; and patterning the pair of fin structures to define a pass-gate transistor, wherein the first mask layer facilitates removing of a portion of a first fin structure of the pair of fin structures to define a first pass-gate fin portion of the pass-gate transistor, and the second mask layer protects a second fin structure of the pair of fin structures to define a second pass-gate fin portion of the pass-gate transistor.
    Type: Application
    Filed: September 14, 2017
    Publication date: January 11, 2018
    Inventors: Robert C. WONG, Lei ZHUANG, Ananthan RAGHUNATHAN
  • Publication number: 20170330883
    Abstract: Fabrication method for a semiconductor memory device and structure are provided, which includes: providing at least two mask layers over a pair of fin structures extended above a substrate, wherein a first mask layer of the at least two mask layers is orthogonal to a second mask layer of the at least two mask layers; and patterning the pair of fin structures to define a pass-gate transistor, wherein the first mask layer facilitates removing of a portion of a first fin structure of the pair of fin structures to define a first pass-gate fin portion of the pass-gate transistor, and the second mask layer protects a second fin structure of the pair of fin structures to define a second pass-gate fin portion of the pass-gate transistor.
    Type: Application
    Filed: May 11, 2016
    Publication date: November 16, 2017
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Robert C. WONG, Lei ZHUANG, Ananthan RAGHUNATHAN
  • Patent number: 9812324
    Abstract: A method includes providing a semiconductor structure having a substrate including a longitudinally extending plurality of fins formed thereon. A target layout pattern is determined, which overlays active areas devices disposed on the fins. The target layout pattern includes a first group of sections overlaying devices having more fins than adjacent devices and a second group of sections overlaying devices having less fins than adjacent devices. A first extended exposure pattern is patterned into the structure, and includes extensions that extend sections of the first group toward adjacent sections of the first group. A second extended exposure pattern is patterned into the structure, and includes extensions that extend sections of the second group toward adjacent sections of the second group. Portions of the first and second extended exposure patterns are combined to form a final pattern overlaying the same active areas as the target pattern.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: November 7, 2017
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Lei Zhuang, Lars Liebmann, Stuart A. Sieg, Fee Li Lie, Mahender Kumar, Shreesh Narasimha, Ahmed Hassan, Guillaume Bouche, Xintuo Dai
  • Patent number: 9799660
    Abstract: Fabrication method for a semiconductor memory device and structure are provided, which includes: providing at least two mask layers over a pair of fin structures extended above a substrate, wherein a first mask layer of the at least two mask layers is orthogonal to a second mask layer of the at least two mask layers; and patterning the pair of fin structures to define a pass-gate transistor, wherein the first mask layer facilitates removing of a portion of a first fin structure of the pair of fin structures to define a first pass-gate fin portion of the pass-gate transistor, and the second mask layer protects a second fin structure of the pair of fin structures to define a second pass-gate fin portion of the pass-gate transistor.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: October 24, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Robert C. Wong, Lei Zhuang, Ananthan Raghunathan